Fixed indexing, flags, and added logical shift
The effective modes that used signed offsets were not properly sign extending the immediate or register index values before adding them to the address, resulting in incorrect addresses. The flags were incorrect for some instructions, and I added the logical shift instruction implementation
This commit is contained in:
transistor
parent
f7529bbb41
commit
a5cac4d309
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@ -552,7 +552,7 @@ impl MC68010 {
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let reg = get_low_reg(ins);
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let rotation = get_high_reg(ins);
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let count = if (ins & 0x0020) == 0 {
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Target::Immediate(rotation as u32)
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Target::Immediate(if rotation != 0 { rotation as u32 } else { 8 })
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} else {
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Target::DirectDReg(rotation)
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};
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@ -595,8 +595,8 @@ impl MC68010 {
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self.get_mode_as_target(space, mode, reg, size)
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}
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fn decode_brief_extension_word(&self, brief_extension: u16) -> (RegisterType, u8, u16, Size) {
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let data = brief_extension & 0x00FF;
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fn decode_brief_extension_word(&self, brief_extension: u16) -> (RegisterType, u8, i32, Size) {
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let data = sign_extend_to_long((brief_extension & 0x00FF) as u32, Size::Byte);
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let xreg = ((brief_extension & 0x7000) >> 12) as u8;
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let size = if (brief_extension & 0x0800) == 0 { Size::Word } else { Size::Long };
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@ -613,13 +613,13 @@ impl MC68010 {
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0b011 => Target::IndirectARegInc(reg),
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0b100 => Target::IndirectARegDec(reg),
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0b101 => {
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let data = self.read_instruction_word(space)?;
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Target::IndirectARegOffset(reg, (data as i16) as i32)
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let data = sign_extend_to_long(self.read_instruction_word(space)? as u32, Size::Word);
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Target::IndirectARegOffset(reg, data)
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},
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0b110 => {
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let brief_extension = self.read_instruction_word(space)?;
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let (rtype, xreg, data, size) = self.decode_brief_extension_word(brief_extension);
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Target::IndirectARegXRegOffset(reg, rtype, xreg, (data as i16) as i32, size)
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Target::IndirectARegXRegOffset(reg, rtype, xreg, data, size)
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},
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0b111 => {
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match reg {
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@ -632,13 +632,13 @@ impl MC68010 {
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Target::IndirectMemory(value)
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},
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0b010 => {
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let data = self.read_instruction_word(space)?;
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Target::IndirectPCOffset((data as i16) as i32)
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let data = sign_extend_to_long(self.read_instruction_word(space)? as u32, Size::Word);
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Target::IndirectPCOffset(data)
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},
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0b011 => {
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let brief_extension = self.read_instruction_word(space)?;
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let (rtype, xreg, data, size) = self.decode_brief_extension_word(brief_extension);
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Target::IndirectPCXRegOffset(rtype, xreg, (data as i16) as i32, size)
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Target::IndirectPCXRegOffset(rtype, xreg, data, size)
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},
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0b100 => {
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let data = match size {
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@ -731,3 +731,11 @@ impl Size {
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}
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}
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pub fn sign_extend_to_long(value: u32, from: Size) -> i32 {
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match from {
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Size::Byte => ((value as u8) as i8) as i32,
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Size::Word => ((value as u16) as i16) as i32,
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Size::Long => value as i32,
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}
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}
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@ -2,7 +2,7 @@
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use crate::error::Error;
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use crate::memory::{Address, AddressSpace};
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use super::decode::{Instruction, Target, Size, Direction, Condition, ControlRegister, RegisterType};
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use super::decode::{Instruction, Target, Size, Direction, Condition, ShiftDirection, ControlRegister, RegisterType, sign_extend_to_long};
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/*
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pub trait Processor {
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@ -18,6 +18,7 @@ pub const FLAGS_CARRY: u16 = 0x0001;
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pub const FLAGS_OVERFLOW: u16 = 0x0002;
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pub const FLAGS_ZERO: u16 = 0x0004;
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pub const FLAGS_NEGATIVE: u16 = 0x0008;
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pub const FLAGS_EXTEND: u16 = 0x0010;
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pub const FLAGS_SUPERVISOR: u16 = 0x2000;
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pub const ERR_BUS_ERROR: u32 = 2;
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@ -200,7 +201,7 @@ impl MC68010 {
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},
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Size::Long => existing.overflowing_add(value),
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};
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self.set_compare_flags(result, overflow, size);
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self.set_compare_flags(result, size, overflow);
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self.set_target_value(space, dest, result, size)?;
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},
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Instruction::AND(src, dest, size) => {
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@ -309,11 +310,21 @@ impl MC68010 {
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},
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//Instruction::LINK(u8, u16) => {
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//},
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//Instruction::LSd(Target, Target, Size, ShiftDirection) => {
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//},
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Instruction::LSd(count, target, size, shift_dir) => {
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let count = self.get_target_value(space, count, size)? % 64;
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let mut pair = (self.get_target_value(space, target, size)?, false);
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for _ in 0..count {
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pair = shift_operation(pair.0, size, shift_dir, false);
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}
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self.set_compare_flags(pair.0, size, false);
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if pair.1 {
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self.sr |= FLAGS_EXTEND | FLAGS_CARRY;
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}
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self.set_target_value(space, target, pair.0, size)?;
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},
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Instruction::MOVE(src, dest, size) => {
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let value = self.get_target_value(space, src, size)?;
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self.set_compare_flags(value, false, size);
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self.set_compare_flags(value, size, false);
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self.set_target_value(space, dest, value, size)?;
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},
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Instruction::MOVEA(src, reg, size) => {
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@ -386,7 +397,7 @@ impl MC68010 {
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Instruction::MOVEQ(data, reg) => {
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let value = sign_extend_to_long(data as u32, Size::Byte) as u32;
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self.d_reg[reg as usize] = value;
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self.set_compare_flags(value, false, Size::Long);
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self.set_compare_flags(value, Size::Long, false);
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},
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//Instruction::MUL(Target, Target, Size, Sign) => {
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//},
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@ -444,7 +455,7 @@ impl MC68010 {
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//},
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Instruction::TST(target, size) => {
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let value = self.get_target_value(space, target, size)?;
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self.set_compare_flags(value, false, size);
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self.set_compare_flags(value, size, false);
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},
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//Instruction::TRAP(u8) => {
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//},
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@ -480,9 +491,9 @@ impl MC68010 {
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get_address_sized(space, (*addr).wrapping_add(offset as u32) as Address, size)
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},
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Target::IndirectARegXRegOffset(reg, rtype, xreg, offset, target_size) => {
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let reg_offset = get_value_sized(self.get_x_reg_value(rtype, xreg), target_size);
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let reg_offset = sign_extend_to_long(self.get_x_reg_value(rtype, xreg), target_size);
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let addr = self.get_a_reg_mut(reg);
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get_address_sized(space, (*addr).wrapping_add(reg_offset).wrapping_add(offset as u32) as Address, size)
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get_address_sized(space, (*addr).wrapping_add(reg_offset as u32).wrapping_add(offset as u32) as Address, size)
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},
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Target::IndirectMemory(addr) => {
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get_address_sized(space, addr as Address, size)
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@ -491,8 +502,8 @@ impl MC68010 {
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get_address_sized(space, self.pc.wrapping_add(offset as u32) as Address, size)
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},
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Target::IndirectPCXRegOffset(rtype, xreg, offset, target_size) => {
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let reg_offset = get_value_sized(self.get_x_reg_value(rtype, xreg), target_size);
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get_address_sized(space, self.pc.wrapping_add(reg_offset).wrapping_add(offset as u32) as Address, size)
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let reg_offset = sign_extend_to_long(self.get_x_reg_value(rtype, xreg), target_size);
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get_address_sized(space, self.pc.wrapping_add(reg_offset as u32).wrapping_add(offset as u32) as Address, size)
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},
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}
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}
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@ -523,9 +534,9 @@ impl MC68010 {
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set_address_sized(space, (*addr).wrapping_add(offset as u32) as Address, value, size)?;
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},
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Target::IndirectARegXRegOffset(reg, rtype, xreg, offset, target_size) => {
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let reg_offset = get_value_sized(self.get_x_reg_value(rtype, xreg), target_size);
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let reg_offset = sign_extend_to_long(self.get_x_reg_value(rtype, xreg), target_size);
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let addr = self.get_a_reg_mut(reg);
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set_address_sized(space, (*addr).wrapping_add(reg_offset).wrapping_add(offset as u32) as Address, value, size)?;
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set_address_sized(space, (*addr).wrapping_add(reg_offset as u32).wrapping_add(offset as u32) as Address, value, size)?;
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},
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Target::IndirectMemory(addr) => {
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set_address_sized(space, addr as Address, value, size)?;
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@ -543,9 +554,9 @@ impl MC68010 {
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(*addr).wrapping_add(offset as u32)
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},
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Target::IndirectARegXRegOffset(reg, rtype, xreg, offset, target_size) => {
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let reg_offset = get_value_sized(self.get_x_reg_value(rtype, xreg), target_size);
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let reg_offset = sign_extend_to_long(self.get_x_reg_value(rtype, xreg), target_size);
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let addr = self.get_a_reg_mut(reg);
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(*addr).wrapping_add(reg_offset).wrapping_add(offset as u32)
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(*addr).wrapping_add(reg_offset as u32).wrapping_add(offset as u32)
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},
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Target::IndirectMemory(addr) => {
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addr
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@ -554,8 +565,8 @@ impl MC68010 {
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self.pc.wrapping_add(offset as u32)
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},
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Target::IndirectPCXRegOffset(rtype, xreg, offset, target_size) => {
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let reg_offset = get_value_sized(self.get_x_reg_value(rtype, xreg), target_size);
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self.pc.wrapping_add(reg_offset).wrapping_add(offset as u32)
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let reg_offset = sign_extend_to_long(self.get_x_reg_value(rtype, xreg), target_size);
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self.pc.wrapping_add(reg_offset as u32).wrapping_add(offset as u32)
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},
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_ => return Err(Error::new(&format!("Invalid addressing target: {:?}", target))),
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};
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@ -574,7 +585,7 @@ impl MC68010 {
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},
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Size::Long => existing.overflowing_sub(diff),
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};
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self.set_compare_flags(result, overflow, size);
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self.set_compare_flags(result, size, overflow);
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result
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}
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@ -613,7 +624,7 @@ impl MC68010 {
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}
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}
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fn set_compare_flags(&mut self, value: u32, carry: bool, size: Size) {
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fn set_compare_flags(&mut self, value: u32, size: Size, carry: bool) {
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let value = sign_extend_to_long(value, size);
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let mut flags = 0x0000;
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@ -631,11 +642,8 @@ impl MC68010 {
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fn set_logic_flags(&mut self, value: u32, size: Size) {
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let mut flags = 0x0000;
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match size {
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Size::Byte if value & 0x80 != 0 => flags |= FLAGS_NEGATIVE,
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Size::Word if value & 0x8000 != 0 => flags |= FLAGS_NEGATIVE,
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Size::Long if value & 0x80000000 != 0 => flags |= FLAGS_NEGATIVE,
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_ => { },
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if get_msb(value, size) {
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flags |= FLAGS_NEGATIVE;
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}
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if value == 0 {
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flags |= FLAGS_ZERO
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@ -710,16 +718,35 @@ fn set_address_sized(space: &mut AddressSpace, addr: Address, value: u32, size:
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}
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}
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fn sign_extend_to_long(value: u32, from: Size) -> i32 {
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match from {
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Size::Byte => ((value as u8) as i8) as i32,
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Size::Word => ((value as u16) as i16) as i32,
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Size::Long => value as i32,
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fn shift_operation(value: u32, size: Size, dir: ShiftDirection, arithmetic: bool) -> (u32, bool) {
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match dir {
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ShiftDirection::Left => {
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match size {
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Size::Byte => (((value as u8) << 1) as u32, get_msb(value, size)),
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Size::Word => (((value as u16) << 1) as u32, get_msb(value, size)),
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Size::Long => ((value << 1) as u32, get_msb(value, size)),
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}
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},
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ShiftDirection::Right => {
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let mask = if arithmetic { get_msb_mask(value, size) } else { 0 };
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((value >> 1) | mask, (value & 0x1) != 0)
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},
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}
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}
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/*
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impl Processor for MC68010 {
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fn get_msb(value: u32, size: Size) -> bool {
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match size {
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Size::Byte => (value & 0x00000080) != 0,
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Size::Word => (value & 0x00008000) != 0,
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Size::Long => (value & 0x80000000) != 0,
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}
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}
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*/
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fn get_msb_mask(value: u32, size: Size) -> u32 {
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match size {
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Size::Byte => value & 0x00000080,
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Size::Word => value & 0x00008000,
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Size::Long => value & 0x80000000,
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}
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}
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@ -25,7 +25,7 @@ fn main() {
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space.insert(0x00700000, Box::new(serial));
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let mut cpu = MC68010::new();
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//cpu.set_breakpoint(0x0224);
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//cpu.set_breakpoint(0x02bc);
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cpu.use_tracing = true;
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while cpu.is_running() {
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match cpu.step(&mut space) {
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