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Refactored m68k decode

This commit is contained in:
transistor 2023-03-25 16:06:03 -07:00
parent 2fe24f325c
commit bc4f63baf3
1 changed files with 548 additions and 511 deletions
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111
emulator/cpus/m68k/src/decode.rs
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@ -74,7 +74,28 @@ impl M68kDecoder {
self.instruction_word = ins;
match ((ins & 0xF000) >> 12) as u8 {
OPCG_BIT_OPS => {
OPCG_BIT_OPS => self.decode_group_bit_ops(memory, ins),
OPCG_MOVE_BYTE => self.decode_group_move_byte(memory, ins),
OPCG_MOVE_LONG => self.decode_group_move_long(memory, ins),
OPCG_MOVE_WORD => self.decode_group_move_word(memory, ins),
OPCG_MISC => self.decode_group_misc(memory, ins),
OPCG_ADDQ_SUBQ => self.decode_group_addq_subq(memory, ins),
OPCG_BRANCH => self.decode_group_branch(memory, ins),
OPCG_MOVEQ => self.decode_group_moveq(memory, ins),
OPCG_DIV_OR => self.decode_group_div_or(memory, ins),
OPCG_SUB => self.decode_group_sub(memory, ins),
OPCG_ALINE => Ok(Instruction::UnimplementedA(ins)),
OPCG_CMP_EOR => self.decode_group_cmp_eor(memory, ins),
OPCG_MUL_AND => self.decode_group_mul_and(memory, ins),
OPCG_ADD => self.decode_group_add(memory, ins),
OPCG_SHIFT => self.decode_group_shift(memory, ins),
OPCG_FLINE => Ok(Instruction::UnimplementedF(ins)),
_ => Err(Error::processor(Exceptions::IllegalInstruction as u32)),
}
}
#[inline]
fn decode_group_bit_ops(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let optype = (ins & 0x0F00) >> 8;
if (ins & 0x13F) == 0x03C {
@ -146,13 +167,17 @@ impl M68kDecoder {
_ => Err(Error::processor(Exceptions::IllegalInstruction as u32)),
}
}
},
OPCG_MOVE_BYTE => {
}
#[inline]
fn decode_group_move_byte(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let src = self.decode_lower_effective_address(memory, ins, Some(Size::Byte))?;
let dest = self.decode_upper_effective_address(memory, ins, Some(Size::Byte))?;
Ok(Instruction::MOVE(src, dest, Size::Byte))
},
OPCG_MOVE_LONG => {
}
#[inline]
fn decode_group_move_long(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let src = self.decode_lower_effective_address(memory, ins, Some(Size::Long))?;
let dest = self.decode_upper_effective_address(memory, ins, Some(Size::Long))?;
if let Target::DirectAReg(reg) = dest {
@ -160,8 +185,10 @@ impl M68kDecoder {
} else {
Ok(Instruction::MOVE(src, dest, Size::Long))
}
},
OPCG_MOVE_WORD => {
}
#[inline]
fn decode_group_move_word(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let src = self.decode_lower_effective_address(memory, ins, Some(Size::Word))?;
let dest = self.decode_upper_effective_address(memory, ins, Some(Size::Word))?;
if let Target::DirectAReg(reg) = dest {
@ -169,8 +196,10 @@ impl M68kDecoder {
} else {
Ok(Instruction::MOVE(src, dest, Size::Word))
}
},
OPCG_MISC => {
}
#[inline]
fn decode_group_misc(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let ins_0f00 = ins & 0xF00;
let ins_00f0 = ins & 0x0F0;
@ -338,8 +367,10 @@ impl M68kDecoder {
} else {
Err(Error::processor(Exceptions::IllegalInstruction as u32))
}
},
OPCG_ADDQ_SUBQ => {
}
#[inline]
fn decode_group_addq_subq(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
match get_size(ins) {
Some(size) => {
let target = self.decode_lower_effective_address(memory, ins, Some(size))?;
@ -374,8 +405,10 @@ impl M68kDecoder {
}
},
}
},
OPCG_BRANCH => {
}
#[inline]
fn decode_group_branch(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let mut disp = ((ins & 0xFF) as i8) as i32;
if disp == 0 {
disp = (self.read_instruction_word(memory)? as i16) as i32;
@ -388,16 +421,20 @@ impl M68kDecoder {
Condition::False => Ok(Instruction::BSR(disp)),
_ => Ok(Instruction::Bcc(condition, disp)),
}
},
OPCG_MOVEQ => {
}
#[inline]
fn decode_group_moveq(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
if (ins & 0x0100) != 0 {
return Err(Error::processor(Exceptions::IllegalInstruction as u32));
}
let reg = get_high_reg(ins);
let data = (ins & 0xFF) as u8;
Ok(Instruction::MOVEQ(data, reg))
},
OPCG_DIV_OR => {
}
#[inline]
fn decode_group_div_or(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let size = get_size(ins);
if (ins & 0x1F0) == 0x100 {
@ -418,8 +455,10 @@ impl M68kDecoder {
let effective_addr = self.decode_lower_effective_address(memory, ins, Some(Size::Word))?;
Ok(Instruction::DIVW(effective_addr, get_high_reg(ins), sign))
}
},
OPCG_SUB => {
}
#[inline]
fn decode_group_sub(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let reg = get_high_reg(ins);
let dir = (ins & 0x0100) >> 8;
let size = get_size(ins);
@ -447,8 +486,10 @@ impl M68kDecoder {
Ok(Instruction::SUBA(target, reg, size))
},
}
},
OPCG_CMP_EOR => {
}
#[inline]
fn decode_group_cmp_eor(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let reg = get_high_reg(ins);
let optype = (ins & 0x0100) >> 8;
let size = get_size(ins);
@ -472,8 +513,10 @@ impl M68kDecoder {
},
_ => Err(Error::processor(Exceptions::IllegalInstruction as u32)),
}
},
OPCG_MUL_AND => {
}
#[inline]
fn decode_group_mul_and(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let size = get_size(ins);
if (ins & 0b0001_1111_0000) == 0b0001_0000_0000 {
@ -503,8 +546,10 @@ impl M68kDecoder {
let effective_addr = self.decode_lower_effective_address(memory, ins, Some(Size::Word))?;
Ok(Instruction::MULW(effective_addr, get_high_reg(ins), sign))
}
},
OPCG_ADD => {
}
#[inline]
fn decode_group_add(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let reg = get_high_reg(ins);
let dir = (ins & 0x0100) >> 8;
let size = get_size(ins);
@ -532,8 +577,9 @@ impl M68kDecoder {
Ok(Instruction::ADDA(target, reg, size))
},
}
},
OPCG_SHIFT => {
}
fn decode_group_shift(&mut self, memory: &mut dyn Addressable, ins: u16) -> Result<Instruction, Error> {
let dir = if (ins & 0x0100) == 0 { ShiftDirection::Right } else { ShiftDirection::Left };
match get_size(ins) {
Some(size) => {
@ -596,15 +642,6 @@ impl M68kDecoder {
}
},
}
},
OPCG_ALINE => {
Ok(Instruction::UnimplementedA(ins))
},
OPCG_FLINE => {
Ok(Instruction::UnimplementedF(ins))
},
_ => Err(Error::processor(Exceptions::IllegalInstruction as u32)),
}
}
fn read_instruction_word(&mut self, memory: &mut dyn Addressable) -> Result<u16, Error> {
@ -694,7 +731,7 @@ impl M68kDecoder {
}
}
pub fn get_mode_as_target(&mut self, memory: &mut dyn Addressable, mode: u8, reg: u8, size: Option<Size>) -> Result<Target, Error> {
fn get_mode_as_target(&mut self, memory: &mut dyn Addressable, mode: u8, reg: u8, size: Option<Size>) -> Result<Target, Error> {
let value = match mode {
0b000 => Target::DirectDReg(reg),
0b001 => Target::DirectAReg(reg),