It's better than it was but there are still minor drop outs due to
a buffer underrun I think (could be other timing issues related to
the update loop or something else). Right now, the audio chips
just have some code to produce sine waves for testing.
I've added skeleton devices for the sound chips, and added the bank
register and banked area of ram mapped to the Z80's bus. Sonic1 will
now run (if the ym2612 device's size is set to 0x1000 instead of 0x04)
Previously it was storing data in the registers, which was an array
of u8, but now it's storing eg. full addresses for the scroll tables
so that they don't need to be fetched from the register values and
converted every rendering. I was thinking this would maybe make
DMA debugging easier, in particular.
There is also a breakpoint error, so that if a read-only memory
location is written to, it will escape to the debugger rather than
exiting the program.
The BusPort is created before the CPU and is passed to it. It can
have an offset, limit the address sizes, and break up bus request
beyond a certain number of bytes into multiple requests
Machine definitions are now in their own module and can be
optionally compiled in, and there is now a console and soon
to be gui version of the compiled binary, with individual
binaries for each machine
