Commit Graph

17 Commits

Author SHA1 Message Date
Terence Boldt
bd41c31f06 Remove unused line 2021-01-08 22:12:24 -05:00
Terence Boldt
bf2d93e22b Update gerber files 2020-12-13 22:32:13 -05:00
Terence Boldt
c35ef5ec75 Update board image with EPROM 2020-12-13 22:23:16 -05:00
Terence Boldt
c93b54c669 Update schematic/PCB to work with more EPROM types 2020-12-13 22:19:04 -05:00
Terence Boldt
3880a1c30c Add ground wires to EPROM address lines 2020-12-13 00:43:19 -05:00
Terence Boldt
b0b077b1a2 Update project status and image 2020-12-10 23:13:12 -05:00
Terence Boldt
04b002098c Remove unnecessary vias 2020-11-19 19:06:00 -05:00
Terence Boldt
61d92b094d Generate gerber and drill files 2020-11-19 16:33:51 -05:00
Terence Boldt
83771ed16b Update power and ground wiring 2020-11-19 16:27:50 -05:00
Terence Boldt
b3465834a1 Update PCB images 2020-11-19 12:43:10 -05:00
Terence Boldt
174c92053b Complete initial PCB layout 2020-11-19 12:31:19 -05:00
Terence Boldt
a444e561ac Update PCB footprints and layout 2020-11-19 11:18:17 -05:00
Terence Boldt
f045f4338f Update schematics and board
- Remove resistor voltage dividers
- Change to 74LVC parts with +3.3V VCC
- Remove control lines
2020-11-19 09:00:27 -05:00
Terence Boldt
ecba35fefe Update PCB component layout 2020-11-16 19:21:56 -05:00
Terence Boldt
dd5ddf4691 Update schematic and create rough PCB layout 2020-11-15 22:44:31 -05:00
Terence Boldt
d632a1d959 Add control lines and resistors - STILL MISSING CAPACITORS AND VCC/GND 2020-11-10 21:49:04 -05:00
Terence Boldt
dc7176cdce Add initial schematic - MISSING RESISTORS AND CONTROL LINES 2020-11-02 21:56:42 -05:00