forked from Apple-2-HW/GR8RAM
Submitted to JLCPCB
This commit is contained in:
Zane Kaminski
parent
62ff891412
commit
dac5bdb451
505
Docs.sch
Normal file
505
Docs.sch
Normal file
@ -0,0 +1,505 @@
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||||
EESchema Schematic File Version 4
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LIBS:GR8RAM-cache
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EELAYER 29 0
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EELAYER END
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$Descr USLetter 11000 8500
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encoding utf-8
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Sheet 2 2
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Title "GR8RAM"
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Date "2019-07-23"
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Rev "0.1"
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Comp "Garrett's Workshop"
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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||||
Wire Wire Line
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8850 2250 8850 2350
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Wire Wire Line
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9450 1950 9450 2050
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||||
Wire Wire Line
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4650 1950 4650 2050
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||||
Wire Wire Line
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||||
4050 2350 4050 2250
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||||
Text Notes 800 2050 2 50 ~ 0
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||||
Acc~CAS~
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Wire Wire Line
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||||
3150 1900 2550 1900
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||||
Wire Bus Line
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||||
4300 950 4300 1600
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||||
Wire Bus Line
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||||
4900 950 4900 1600
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||||
Text Notes 4300 1700 0 40 ~ 0
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||||
Allow CS, OE, WE
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||||
Text Notes 3700 1750 0 40 ~ 0
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||||
Latch addr. attr.\nSwitch ext. ROM
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||||
Text Notes 800 2350 2 50 ~ 0
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~RAS~
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Text Notes 800 1900 2 50 ~ 0
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Ref~CAS~
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Text Notes 1500 1100 0 40 ~ 0
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S7
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Text Notes 6600 850 0 104 ~ 0
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Video Access
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||||
Text Notes 8600 850 0 100 ~ 0
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||||
6502 CPU Access
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Wire Bus Line
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||||
5500 950 5500 1600
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||||
Text Notes 5700 1100 0 40 ~ 0
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S7
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Wire Wire Line
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3450 1150 6150 1150
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Wire Wire Line
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3450 1400 6150 1400
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Wire Wire Line
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4650 1550 6150 1550
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Wire Wire Line
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5800 1000 5800 1100
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||||
Wire Wire Line
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5500 1000 5800 1000
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||||
Wire Wire Line
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||||
5500 1100 5500 1000
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||||
Wire Wire Line
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5200 1100 5500 1100
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||||
Wire Wire Line
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6400 1000 6400 1100
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||||
Wire Wire Line
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||||
6100 1000 6400 1000
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||||
Wire Wire Line
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||||
6100 1100 6100 1000
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||||
Wire Wire Line
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||||
5800 1100 6100 1100
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||||
Wire Wire Line
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||||
6150 1550 6150 1450
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||||
Wire Wire Line
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||||
6150 1400 6150 1300
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||||
Wire Wire Line
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||||
6150 1150 6150 1250
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||||
Wire Bus Line
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||||
6100 850 6100 1700
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||||
Text Notes 6100 1700 0 40 ~ 0
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||||
Latch WR data
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||||
Text Notes 6300 1100 0 40 ~ 0
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||||
S8
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Wire Wire Line
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||||
10300 1100 10300 1000
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||||
Wire Wire Line
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10000 1100 10300 1100
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||||
Wire Wire Line
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10000 1000 10000 1100
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||||
Wire Wire Line
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||||
9700 1000 10000 1000
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||||
Wire Wire Line
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9700 1100 9700 1000
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Wire Wire Line
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9400 1100 9700 1100
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Wire Wire Line
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9400 1000 9400 1100
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||||
Wire Wire Line
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9100 1000 9400 1000
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||||
Wire Wire Line
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9100 1100 9100 1000
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||||
Wire Wire Line
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8800 1100 9100 1100
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Wire Wire Line
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8800 1000 8800 1100
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Wire Wire Line
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8500 1000 8800 1000
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||||
Wire Wire Line
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8500 1100 8500 1000
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||||
Wire Wire Line
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8200 1100 8500 1100
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||||
Wire Wire Line
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8200 1000 8200 1100
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Wire Wire Line
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7900 1000 8200 1000
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Wire Wire Line
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7900 1100 7900 1000
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Wire Wire Line
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7600 1100 7900 1100
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Wire Wire Line
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7300 1100 7300 1000
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Wire Wire Line
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7000 1100 7300 1100
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Wire Wire Line
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7000 1000 7000 1100
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Wire Wire Line
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6700 1000 7000 1000
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Wire Wire Line
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6700 1100 6700 1000
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Wire Wire Line
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6400 1100 6700 1100
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Wire Wire Line
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7600 1000 7600 1100
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Wire Wire Line
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10350 1550 9450 1550
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Wire Wire Line
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8250 1450 9450 1450
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Wire Wire Line
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7350 1550 8250 1550
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Wire Wire Line
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8250 1450 8250 1550
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Wire Wire Line
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10350 1550 10350 1450
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Wire Wire Line
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9450 1450 9450 1550
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Wire Wire Line
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7350 1450 7350 1550
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Wire Wire Line
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7300 1000 7600 1000
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Text Notes 6900 1100 0 40 ~ 0
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S1
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Text Notes 7500 1100 0 40 ~ 0
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S2
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Wire Wire Line
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10350 1400 10350 1300
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Wire Wire Line
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8250 1400 10350 1400
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Wire Wire Line
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8250 1300 8250 1400
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Wire Wire Line
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10350 1150 10350 1250
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Wire Wire Line
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8250 1150 10350 1150
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Wire Wire Line
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8250 1250 8250 1150
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Wire Bus Line
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8200 850 8200 1700
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Wire Bus Line
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6700 950 6700 1600
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Wire Bus Line
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7300 950 7300 1600
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Wire Bus Line
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7900 950 7900 1600
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Wire Bus Line
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8500 950 8500 1600
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Wire Bus Line
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9100 950 9100 1600
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Wire Bus Line
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9700 950 9700 1600
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Wire Bus Line
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10300 850 10300 1700
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Text Notes 8100 1100 0 40 ~ 0
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S3
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Text Notes 9100 1700 0 40 ~ 0
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Allow CS, OE, WE
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Text Notes 8700 1100 0 40 ~ 0
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S4
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Text Notes 9300 1100 0 40 ~ 0
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S5
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Text Notes 9900 1100 0 40 ~ 0
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S6
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Text Notes 8500 1750 0 40 ~ 0
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Latch addr. attr.\nSwitch ext. ROM
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Text Notes 6700 1750 0 40 ~ 0
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Disallow CS, OE, WE\nIncrement addr. if attr.
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Wire Wire Line
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6150 1250 8250 1250
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Wire Wire Line
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6150 1300 8250 1300
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Wire Wire Line
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6150 1450 7350 1450
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Wire Bus Line
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1300 850 1300 1700
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Wire Wire Line
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7350 1800 7350 1900
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Wire Wire Line
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3150 1900 3150 1800
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Wire Wire Line
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2550 1800 2550 1900
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Wire Wire Line
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3450 2350 3450 2250
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Wire Wire Line
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2850 2350 3450 2350
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Wire Wire Line
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2850 2250 2850 2350
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Text Notes 1900 1750 0 40 ~ 0
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Disallow CS, OE, WE\nIncrement addr. if attr.
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Text Notes 1300 1650 0 40 ~ 0
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Latch WR data
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Text Notes 5100 1100 0 40 ~ 0
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S6
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Text Notes 4500 1100 0 40 ~ 0
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S5
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Text Notes 3900 1100 0 40 ~ 0
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S4
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Text Notes 1800 850 0 104 ~ 0
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Video Access
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Text Notes 3300 1100 0 40 ~ 0
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S3
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Wire Bus Line
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3700 950 3700 1600
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Wire Bus Line
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3100 950 3100 1600
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Wire Bus Line
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2500 950 2500 1600
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Wire Bus Line
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1900 950 1900 1600
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Wire Bus Line
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3400 850 3400 1700
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Wire Wire Line
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900 1550 1350 1550
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Wire Wire Line
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1350 1400 900 1400
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Wire Wire Line
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900 1150 1350 1150
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Text Notes 800 1250 2 50 ~ 0
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PHI0
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Wire Wire Line
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1350 1150 1350 1250
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Wire Wire Line
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1350 1250 3450 1250
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Wire Wire Line
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3450 1250 3450 1150
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Text Notes 3850 850 0 100 ~ 0
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6502 CPU Access (long)
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Text Notes 800 1400 2 50 ~ 0
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PHI1
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Wire Wire Line
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1350 1400 1350 1300
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Wire Wire Line
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1350 1300 3450 1300
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Wire Wire Line
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3450 1300 3450 1400
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Text Notes 900 1100 0 40 ~ 0
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S6
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Text Notes 2700 1100 0 40 ~ 0
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S2
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Text Notes 2100 1100 0 40 ~ 0
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S1
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Wire Wire Line
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2500 1000 2800 1000
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Wire Wire Line
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1350 1450 1350 1550
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Wire Wire Line
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2550 1450 1350 1450
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Wire Wire Line
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2550 1450 2550 1550
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Text Notes 800 1550 2 50 ~ 0
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Q3
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Wire Wire Line
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4650 1450 4650 1550
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Wire Wire Line
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3450 1450 3450 1550
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Wire Wire Line
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2550 1550 3450 1550
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Wire Wire Line
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3450 1450 4650 1450
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Wire Wire Line
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1000 1100 1300 1100
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Wire Wire Line
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1000 1000 900 1000
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Wire Wire Line
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1000 1100 1000 1000
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Wire Wire Line
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2800 1000 2800 1100
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Text Notes 800 1100 2 50 ~ 0
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C7M
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Wire Wire Line
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1300 1100 1300 1000
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Wire Wire Line
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1300 1000 1600 1000
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Wire Wire Line
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1600 1000 1600 1100
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Wire Wire Line
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1600 1100 1900 1100
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Wire Wire Line
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1900 1100 1900 1000
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Wire Wire Line
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1900 1000 2200 1000
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Wire Wire Line
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2200 1000 2200 1100
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Wire Wire Line
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2200 1100 2500 1100
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Wire Wire Line
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2500 1100 2500 1000
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Wire Wire Line
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2800 1100 3100 1100
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Wire Wire Line
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3100 1100 3100 1000
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Wire Wire Line
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3100 1000 3400 1000
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Wire Wire Line
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3400 1000 3400 1100
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Wire Wire Line
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3400 1100 3700 1100
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Wire Wire Line
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3700 1100 3700 1000
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Wire Wire Line
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3700 1000 4000 1000
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Wire Wire Line
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4000 1000 4000 1100
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Wire Wire Line
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4000 1100 4300 1100
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Wire Wire Line
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4300 1100 4300 1000
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Wire Wire Line
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4300 1000 4600 1000
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Wire Wire Line
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4600 1000 4600 1100
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Wire Wire Line
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4600 1100 4900 1100
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Wire Wire Line
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4900 1100 4900 1000
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Wire Wire Line
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4900 1000 5200 1000
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Wire Wire Line
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5200 1000 5200 1100
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Wire Wire Line
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9700 2400 9750 2500
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Wire Wire Line
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9700 2500 9750 2400
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Wire Wire Line
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9150 2500 9700 2500
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Wire Wire Line
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9150 2400 9700 2400
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Wire Wire Line
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9100 2500 9150 2400
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Wire Wire Line
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9100 2400 9150 2500
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Wire Wire Line
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9100 2500 4950 2500
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Wire Wire Line
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4950 2400 9100 2400
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Wire Wire Line
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4900 2400 4950 2500
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Wire Wire Line
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4900 2500 4950 2400
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Wire Wire Line
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4350 2500 4900 2500
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Wire Wire Line
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4350 2400 4900 2400
|
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Wire Wire Line
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4300 2500 4350 2400
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Wire Wire Line
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4300 2400 4350 2500
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Wire Wire Line
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900 2400 4300 2400
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Wire Wire Line
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4300 2500 900 2500
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Text Notes 800 2500 2 50 ~ 0
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RA
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Wire Wire Line
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2250 2050 2250 1950
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Wire Wire Line
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2250 1950 4650 1950
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Wire Wire Line
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5250 2350 5250 2250
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Wire Wire Line
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5250 2250 8850 2250
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Wire Wire Line
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1050 2350 1050 2250
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Wire Wire Line
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1050 2250 2850 2250
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Wire Wire Line
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900 2350 1050 2350
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Wire Wire Line
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8850 2350 10050 2350
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Wire Wire Line
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10050 2350 10050 2250
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Wire Wire Line
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3450 2250 4050 2250
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Wire Wire Line
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7950 1900 7950 1800
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Wire Wire Line
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7950 1900 7350 1900
|
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Wire Wire Line
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9450 2100 9450 2200
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Wire Wire Line
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4650 2100 4650 2200
|
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Text Notes 800 2200 2 50 ~ 0
|
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~CAS~
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Wire Wire Line
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2250 2200 2250 2100
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Wire Wire Line
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3150 2200 3150 2100
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Wire Wire Line
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2550 2100 2550 2200
|
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Wire Wire Line
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2250 2100 2550 2100
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Wire Wire Line
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7350 2100 7350 2200
|
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Wire Wire Line
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7950 2200 7950 2100
|
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Wire Wire Line
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7950 2200 7350 2200
|
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Wire Wire Line
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7950 2100 9450 2100
|
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Wire Wire Line
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4650 2200 6150 2200
|
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Wire Wire Line
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6150 2200 6150 2100
|
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Wire Wire Line
|
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6150 2100 7350 2100
|
||||
Wire Wire Line
|
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9450 2200 10350 2200
|
||||
Wire Wire Line
|
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10350 2200 10350 2100
|
||||
Wire Wire Line
|
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4650 2050 6450 2050
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Wire Wire Line
|
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6450 2050 6450 1950
|
||||
Wire Wire Line
|
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6450 1950 9450 1950
|
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Wire Wire Line
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900 2200 2250 2200
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Wire Wire Line
|
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900 2050 2250 2050
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Wire Wire Line
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3150 1800 7350 1800
|
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Wire Wire Line
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900 1800 2550 1800
|
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Wire Wire Line
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3150 2100 4650 2100
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Wire Wire Line
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2550 2200 3150 2200
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Wire Wire Line
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4050 2350 5250 2350
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Text Notes 4550 3800 0 50 ~ 0
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CSEN = S4 | S5 | S6 | S7 @ C7M\nRCS = (IOSEL | (IOSTRB & IOROMEN)) & CSEN\nR~OE~ = ~R~W\n\nRWE = ~R~W & (DEVSEL | IOSEL | IOSTRB)\n\nRAS = (RAMSEL & (S4 | S5)) | S2 @ ~C7M~\nRefCAS = S1 @ C7M\nAccCAS = RAMSEL & (S5 | S6 | S7) @ ~C7M~\nCAS0 = (RefCAS) | (AccCAS & ~Addr[22]~ & DEVSEL)\nCAS1 = (RefCAS) | (AccCAS & Addr[22] & DEVSEL)
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Text Notes 1300 2850 0 100 ~ 0
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State Synchronization
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Text Notes 4500 2850 0 100 ~ 0
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ROM / DRAM Control
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Text Notes 7150 2850 0 100 ~ 0
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Address Bus Routing
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||||
Wire Wire Line
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10350 2100 10400 2100
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Wire Wire Line
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7950 1800 10400 1800
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||||
Wire Wire Line
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||||
10050 2250 10400 2250
|
||||
Wire Wire Line
|
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9450 2050 10400 2050
|
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Wire Wire Line
|
||||
10400 2400 9750 2400
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||||
Wire Wire Line
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||||
9750 2500 10400 2500
|
||||
Text Notes 10000 1750 0 40 ~ 0
|
||||
Latch WR data
|
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Wire Wire Line
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||||
10300 1000 10400 1000
|
||||
Wire Wire Line
|
||||
10350 1250 10400 1250
|
||||
Wire Wire Line
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||||
10350 1300 10400 1300
|
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Wire Wire Line
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||||
10350 1450 10400 1450
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||||
Text Notes 7200 4650 0 50 ~ 0
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||||
RD[7:0] = (~DEVSEL~ | R~W~) ? 8’bZ : D[7:0]\nD[7:0] = (~CSEN~ | ~DEVSEL~ | ~R~W) ? 8’bZ :\n AddrHSEL ? {1’b1, Addr[22:16]} : \n AddrMSEL ? Addr[15:8] : \n AddrLSEL ? Addr[7:0] : \n RD[7:0]
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Text Notes 7150 4100 0 100 ~ 0
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Data Bus Routing
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||||
Text Notes 7200 3850 0 50 ~ 0
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Addr[22:16] = (S6 & AddrHSEL & ~R~W) ? D[6:0] : Addr[22:16] @ C7M\nAddr[15:8] = (S6 if AddrMSEL & ~R~W) ? D[7:0] : Addr[15:8] @ C7M\nAddr[7:0] = (S6 if AddrLSEL & ~R~W) ? D[7:0] : Addr[7:0] @ C7M\nif (RAMSEL & S1) Addr[22:0]++ @ C7M\nBank[6:0] = (S6 & BANKREG & ~R~W) ? D[7:0] : Bank[7:0] @ C7M
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Text Notes 7150 3400 0 100 ~ 0
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||||
6502-Accessible Registers
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||||
Text Notes 7200 3150 0 50 ~ 0
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||||
RA[10:8] = S4 ? Addr[10:8] : Addr[21:19] @ C7M\nRA[7:1] = RAMSEL ? (S4 ? Addr[7:1] : Addr[18:12]) : Bank[6:0] @ C7M\nRA[0] = RAMSEL ? (S4 ? Addr[0] : Addr[11]) : A[11] @ C7M
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Text Notes 1350 4250 0 50 ~ 0
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||||
BankSEL = S3 ? (A==XXXF & DEVSEL & REGEN) : BankSEL @ C7M\nRAMSEL = S3 ? (A==XXX3 & DEVSEL & REGEN) : RAMSEL @ C7M\nAddrHSEL = S3 ? (A==XXX2 & DEVSEL & REGEN) : AddrHSEL @ C7M\nAddrMSEL = S3 ? (A==XXX1 & DEVSEL & REGEN) : AddrMSEL @ C7M\nAddrLSEL = S3 ? (A==XXX0 & DEVSEL & REGEN) : AddrLSEL @ C7M\n\nREGEN = (IOSEL & S3) ? 1 : REGEN @ C7M\nIOROMEN = (A==XXFF & IOSTRB & S3) ? 0 :\n (A==XX00 & IOSEL & S3) ? 1 :\n IOROMEN @ C7M
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Text Notes 1300 3400 0 100 ~ 0
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Select signals (registered)
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||||
Text Notes 1350 3150 0 50 ~ 0
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||||
PHI0reg = PHI0 @ C7M\nS[3:0] = (~PHI0~ & PHI0reg) ? 1 : \n (S==0) ? 0 : S+1 @ C7M
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$EndSCHEMATC
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||||
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GR8RAM.kicad_pcb
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GR8RAM.pdf
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update=Sunday, July 21, 2019 at 05:51:33 PM
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update=Tuesday, July 23, 2019 at 03:52:01 PM
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54250.7 48920.9 moveto
|
||||
54459.5 48712.1 lineto
|
||||
stroke
|
||||
newpath
|
||||
54459.5 48920.9 moveto
|
||||
54250.7 48712.1 lineto
|
||||
stroke
|
||||
newpath
|
||||
54692.6 44059.7 moveto
|
||||
54901.4 43850.9 lineto
|
||||
stroke
|
||||
@ -1102,6 +1118,14 @@ newpath
|
||||
55488.1 42790.3 lineto
|
||||
stroke
|
||||
newpath
|
||||
55576.5 45650.6 moveto
|
||||
55785.2 45441.8 lineto
|
||||
stroke
|
||||
newpath
|
||||
55785.2 45650.6 moveto
|
||||
55576.5 45441.8 lineto
|
||||
stroke
|
||||
newpath
|
||||
57255.8 42999 moveto
|
||||
57464.6 42790.3 lineto
|
||||
stroke
|
||||
@ -3454,15 +3478,13 @@ newpath
|
||||
40894.3 32807.7 lineto
|
||||
stroke
|
||||
newpath
|
||||
42750.4 32695.2 moveto
|
||||
42075.4 32695.2 lineto
|
||||
42637.9 33482.6 moveto
|
||||
42637.9 32695.2 lineto
|
||||
stroke
|
||||
newpath
|
||||
42412.9 32695.2 moveto
|
||||
42412.9 33876.3 lineto
|
||||
42300.4 33707.5 lineto
|
||||
42187.9 33595.1 lineto
|
||||
42075.4 33538.8 lineto
|
||||
42356.7 33932.5 moveto
|
||||
42075.4 33088.9 lineto
|
||||
42806.6 33088.9 lineto
|
||||
stroke
|
||||
newpath
|
||||
44156.4 32695.2 moveto
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
M48
|
||||
; DRILL file {KiCad (5.1.2-1)-1} date Sunday, July 21, 2019 at 05:52:15 PM
|
||||
; DRILL file {KiCad (5.1.2-1)-1} date Monday, July 29, 2019 at 08:34:47 PM
|
||||
; FORMAT={-:-/ absolute / inch / decimal}
|
||||
; #@! TF.CreationDate,2019-07-21T17:52:15-04:00
|
||||
; #@! TF.CreationDate,2019-07-29T20:34:47-04:00
|
||||
; #@! TF.GenerationSoftware,Kicad,Pcbnew,(5.1.2-1)-1
|
||||
FMAT,2
|
||||
INCH
|
||||
@ -111,6 +111,7 @@ X3.05Y-3.8
|
||||
X3.05Y-4.6
|
||||
X3.05Y-5.17
|
||||
X3.075Y-3.7
|
||||
X3.075Y-4.505
|
||||
X3.1Y-4.1
|
||||
X3.1Y-5.02
|
||||
X3.105Y-3.8
|
||||
@ -134,8 +135,10 @@ X3.32Y-4.65
|
||||
X3.35Y-5.17
|
||||
X3.36Y-4.945
|
||||
X3.375Y-3.75
|
||||
X3.38Y-4.835
|
||||
X3.405Y-5.11
|
||||
X3.45Y-5.17
|
||||
X3.455Y-5.02
|
||||
X3.55Y-5.17
|
||||
X3.615Y-3.7
|
||||
X3.615Y-4.675
|
||||
|
||||
Loading…
Reference in New Issue
Block a user