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27a9076cb5
8bitworkshop/presets/verilog
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Steven Hugg 27a9076cb5 verilog: 2d array; digits; score; reset w/ no init; more warnings
2017-11-19 13:26:21 -05:00
..
ball_paddle.v verilog: 2d array; digits; score; reset w/ no init; more warnings 2017-11-19 13:26:21 -05:00
clock_divider.v support `include statements in verilog; book link changes; paddle/switches; scope transitions 2017-11-16 10:30:47 -05:00
digits10.v verilog: 2d array; digits; score; reset w/ no init; more warnings 2017-11-19 13:26:21 -05:00
hvsync_generator.v verilog: 2d array; digits; score; reset w/ no init; more warnings 2017-11-19 13:26:21 -05:00
lfsr.v support `include statements in verilog; book link changes; paddle/switches; scope transitions 2017-11-16 10:30:47 -05:00
pong.v support `include statements in verilog; book link changes; paddle/switches; scope transitions 2017-11-16 10:30:47 -05:00
test_hvsync.v more paddle/pong stuff; wider compiler msgs 2017-11-17 17:03:11 -05:00