2015-07-02 14:35:05 +00:00
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/* dis6809.c -- 6809 disassembler
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Copyright (C) 1998 Jerome Thoen
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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2015-07-06 17:49:57 +00:00
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#include <avr/pgmspace.h>
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2015-07-02 14:35:05 +00:00
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#include "AtomBusMon.h"
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2015-07-02 17:00:40 +00:00
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enum opcodes {
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OP_UU ,
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OP_XX ,
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OP_ABX ,
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OP_ADCA,
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OP_ADCB,
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OP_ADDA,
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OP_ADDB,
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OP_ADDD,
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OP_ANDA,
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OP_ANDB,
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OP_ANDC,
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OP_ASL ,
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OP_ASLA,
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OP_ASR ,
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OP_ASRA,
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OP_ASRB,
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OP_BCC ,
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OP_BEQ ,
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OP_BGE ,
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OP_BGT ,
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OP_BHI ,
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OP_BITA,
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OP_BITB,
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OP_BLE ,
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OP_BLO ,
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OP_BLS ,
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OP_BLT ,
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OP_BMI ,
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OP_BNE ,
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OP_BPL ,
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OP_BRA ,
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OP_BRN ,
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OP_BSR ,
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OP_BVC ,
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OP_BVS ,
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OP_CLR ,
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OP_CLRA,
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OP_CLRB,
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OP_CMPA,
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OP_CMPB,
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OP_CMPD,
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OP_CMPS,
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OP_CMPU,
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OP_CMPX,
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OP_CMPY,
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OP_COM ,
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OP_COMA,
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OP_COMB,
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OP_CWAI,
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OP_DAA ,
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OP_DEC ,
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OP_DECA,
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OP_DECB,
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OP_EORA,
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OP_EORB,
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OP_EXG ,
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OP_INC ,
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OP_INCA,
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OP_INCB,
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OP_JMP ,
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OP_JSR ,
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OP_LBCC,
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OP_LBEQ,
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OP_LBGE,
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OP_LBGT,
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OP_LBHI,
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OP_LBLE,
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OP_LBLO,
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OP_LBLS,
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OP_LBLT,
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OP_LBMI,
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OP_LBNE,
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OP_LBPL,
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OP_LBRA,
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OP_LBRN,
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OP_LBSR,
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OP_LBVC,
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OP_LBVS,
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OP_LDA ,
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OP_LDB ,
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OP_LDD ,
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OP_LDS ,
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OP_LDU ,
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OP_LDX ,
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OP_LDY ,
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OP_LEAS,
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OP_LEAU,
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OP_LEAX,
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OP_LEAY,
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OP_LSLB,
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OP_LSR ,
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OP_LSRA,
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OP_LSRB,
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OP_MUL ,
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OP_NEG ,
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OP_NEGA,
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OP_NEGB,
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OP_NOP ,
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OP_ORA ,
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OP_ORB ,
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OP_ORCC,
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OP_PSHS,
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OP_PSHU,
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OP_PULS,
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OP_PULU,
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OP_ROL ,
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OP_ROLA,
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OP_ROLB,
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OP_ROR ,
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OP_RORA,
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OP_RORB,
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OP_RTI ,
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OP_RTS ,
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OP_SBCA,
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OP_SBCB,
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OP_SEX ,
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OP_STA ,
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OP_STB ,
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OP_STD ,
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OP_STS ,
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OP_STU ,
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OP_STX ,
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OP_STY ,
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OP_SUBA,
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OP_SUBB,
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OP_SUBD,
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OP_SWI ,
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OP_SWI2,
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OP_SWI3,
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OP_SYNC,
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OP_TFR ,
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OP_TST ,
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OP_TSTA,
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OP_TSTB
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};
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2015-07-02 14:35:05 +00:00
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2015-07-06 17:49:57 +00:00
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static const char inst[] PROGMEM = "\
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2015-07-02 17:00:40 +00:00
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-- \
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?? \
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ABX \
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ADCA\
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ADCB\
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ADDA\
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ADDB\
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ADDD\
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ANDA\
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ANDB\
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ANDC\
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ASL \
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ASLA\
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ASR \
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ASRA\
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ASRB\
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BCC \
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BEQ \
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BGE \
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BGT \
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BHI \
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BITA\
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BITB\
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BLE \
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BLO \
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BLS \
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BLT \
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BMI \
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BNE \
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BPL \
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BRA \
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BRN \
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BSR \
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BVC \
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BVS \
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CLR \
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CLRA\
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CLRB\
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CMPA\
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CMPB\
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CMPD\
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CMPS\
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CMPU\
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CMPX\
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CMPY\
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COM \
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COMA\
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COMB\
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CWAI\
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DAA \
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DEC \
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DECA\
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DECB\
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EORA\
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EORB\
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EXG \
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INC \
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INCA\
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INCB\
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JMP \
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JSR \
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LBCC\
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LBEQ\
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LBGE\
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LBGT\
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LBHI\
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LBLE\
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LBLO\
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LBLS\
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LBLT\
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LBMI\
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LBNE\
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LBPL\
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LBRA\
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LBRN\
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LBSR\
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LBVC\
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LBVS\
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LDA \
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LDB \
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LDD \
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LDS \
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LDU \
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LDX \
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LDY \
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LEAS\
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LEAU\
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LEAX\
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LEAY\
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LSLB\
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LSR \
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LSRA\
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LSRB\
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MUL \
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NEG \
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NEGA\
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NEGB\
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NOP \
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ORA \
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ORB \
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ORCC\
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PSHS\
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PSHU\
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PULS\
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PULU\
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ROL \
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ROLA\
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ROLB\
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ROR \
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RORA\
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RORB\
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RTI \
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RTS \
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SBCA\
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SBCB\
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SEX \
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STA \
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STB \
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STD \
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STS \
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STU \
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STX \
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STY \
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SUBA\
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SUBB\
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SUBD\
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SWI \
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SWI2\
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SWI3\
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SYNC\
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TFR \
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TST \
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TSTA\
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TSTB";
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// The first byte is the opcode index
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// The second byte is <length><mode>
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2019-11-12 11:50:49 +00:00
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// modes:
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// 1 immediate
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// 2 direct
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// 3 indexed
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// 4 extended
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// 5 inherent
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// 6 relative
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static const uint8_t map0[] PROGMEM = {
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2015-07-02 17:00:40 +00:00
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OP_NEG , 0x22,
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OP_XX , 0x22,
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OP_XX , 0x12,
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OP_COM , 0x22,
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OP_LSR , 0x22,
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OP_XX , 0x12,
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OP_ROR , 0x22,
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OP_ASR , 0x22,
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OP_ASL , 0x22,
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OP_ROL , 0x22,
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OP_DEC , 0x22,
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OP_XX , 0x12,
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OP_INC , 0x22,
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OP_TST , 0x22,
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OP_JMP , 0x22,
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OP_CLR , 0x22,
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OP_UU , 0x10,
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OP_UU , 0x10,
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OP_NOP , 0x15,
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OP_SYNC, 0x15,
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OP_XX , 0x10,
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OP_XX , 0x10,
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OP_LBRA, 0x36,
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OP_LBSR, 0x36,
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OP_XX , 0x10,
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OP_DAA , 0x15,
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OP_ORCC, 0x25,
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OP_XX , 0x10,
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OP_ANDC, 0x25,
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OP_SEX , 0x15,
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OP_EXG , 0x25,
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OP_TFR , 0x25,
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OP_BRA , 0x26,
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OP_BRN , 0x26,
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OP_BHI , 0x26,
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OP_BLS , 0x26,
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OP_BCC , 0x26,
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OP_BLO , 0x26,
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OP_BNE , 0x26,
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OP_BEQ , 0x26,
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OP_BVC , 0x26,
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OP_BVS , 0x26,
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OP_BPL , 0x26,
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OP_BMI , 0x26,
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OP_BGE , 0x26,
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OP_BLT , 0x26,
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OP_BGT , 0x26,
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OP_BLE , 0x26,
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OP_LEAX, 0x23,
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OP_LEAY, 0x23,
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OP_LEAS, 0x23,
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OP_LEAU, 0x23,
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OP_PSHS, 0x25,
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OP_PULS, 0x25,
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OP_PSHU, 0x25,
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OP_PULU, 0x25,
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OP_XX , 0x15,
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OP_RTS , 0x15,
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OP_ABX , 0x15,
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OP_RTI , 0x15,
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OP_CWAI, 0x25,
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OP_MUL , 0x15,
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OP_XX , 0x15,
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OP_SWI , 0x15,
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OP_NEGA, 0x15,
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OP_XX , 0x15,
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OP_XX , 0x15,
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OP_COMA, 0x15,
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OP_LSRA, 0x15,
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OP_XX , 0x15,
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OP_RORA, 0x15,
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OP_ASRA, 0x15,
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OP_ASLA, 0x15,
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OP_ROLA, 0x15,
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OP_DECA, 0x15,
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OP_XX , 0x15,
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OP_INCA, 0x15,
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OP_TSTA, 0x15,
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OP_XX , 0x15,
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OP_CLRA, 0x15,
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OP_NEGB, 0x15,
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OP_XX , 0x15,
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OP_XX , 0x15,
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OP_COMB, 0x15,
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OP_LSRB, 0x15,
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OP_XX , 0x15,
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OP_RORB, 0x15,
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OP_ASRB, 0x15,
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OP_LSLB, 0x15,
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OP_ROLB, 0x15,
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OP_DECB, 0x15,
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OP_XX , 0x15,
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OP_INCB, 0x15,
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OP_TSTB, 0x15,
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OP_XX , 0x15,
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OP_CLRB, 0x15,
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OP_NEG , 0x23,
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OP_XX , 0x13,
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OP_XX , 0x13,
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OP_COM , 0x23,
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OP_LSR , 0x23,
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OP_XX , 0x13,
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OP_ROR , 0x23,
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OP_ASR , 0x23,
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OP_ASL , 0x23,
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OP_ROL , 0x23,
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OP_DEC , 0x23,
|
|
|
|
OP_XX , 0x13,
|
|
|
|
OP_INC , 0x23,
|
|
|
|
OP_TST , 0x23,
|
|
|
|
OP_JMP , 0x23,
|
|
|
|
OP_CLR , 0x23,
|
|
|
|
OP_NEG , 0x34,
|
|
|
|
OP_XX , 0x14,
|
|
|
|
OP_XX , 0x14,
|
|
|
|
OP_COM , 0x34,
|
|
|
|
OP_LSR , 0x34,
|
|
|
|
OP_XX , 0x14,
|
|
|
|
OP_ROR , 0x34,
|
|
|
|
OP_ASR , 0x34,
|
|
|
|
OP_ASL , 0x34,
|
|
|
|
OP_ROL , 0x34,
|
|
|
|
OP_DEC , 0x34,
|
|
|
|
OP_XX , 0x14,
|
|
|
|
OP_INC , 0x34,
|
|
|
|
OP_TST , 0x34,
|
|
|
|
OP_JMP , 0x34,
|
|
|
|
OP_CLR , 0x34,
|
|
|
|
OP_SUBA, 0x21,
|
|
|
|
OP_CMPA, 0x21,
|
|
|
|
OP_SBCA, 0x21,
|
|
|
|
OP_SUBD, 0x31,
|
|
|
|
OP_ANDA, 0x21,
|
|
|
|
OP_BITA, 0x21,
|
|
|
|
OP_LDA , 0x21,
|
|
|
|
OP_XX , 0x11,
|
|
|
|
OP_EORA, 0x21,
|
|
|
|
OP_ADCA, 0x21,
|
|
|
|
OP_ORA , 0x21,
|
|
|
|
OP_ADDA, 0x21,
|
|
|
|
OP_CMPX, 0x31,
|
|
|
|
OP_BSR , 0x26,
|
|
|
|
OP_LDX , 0x31,
|
|
|
|
OP_XX , 0x10,
|
|
|
|
OP_SUBA, 0x22,
|
|
|
|
OP_CMPA, 0x22,
|
|
|
|
OP_SBCA, 0x22,
|
|
|
|
OP_SUBD, 0x22,
|
|
|
|
OP_ANDA, 0x22,
|
|
|
|
OP_BITA, 0x22,
|
|
|
|
OP_LDA , 0x22,
|
|
|
|
OP_STA , 0x22,
|
|
|
|
OP_EORA, 0x22,
|
|
|
|
OP_ADCA, 0x22,
|
|
|
|
OP_ORA , 0x22,
|
|
|
|
OP_ADDA, 0x22,
|
|
|
|
OP_CMPX, 0x22,
|
|
|
|
OP_JSR , 0x22,
|
|
|
|
OP_LDX , 0x22,
|
|
|
|
OP_STX , 0x22,
|
|
|
|
OP_SUBA, 0x23,
|
|
|
|
OP_CMPA, 0x23,
|
|
|
|
OP_SBCA, 0x23,
|
|
|
|
OP_SUBD, 0x23,
|
|
|
|
OP_ANDA, 0x23,
|
|
|
|
OP_BITA, 0x23,
|
|
|
|
OP_LDA , 0x23,
|
|
|
|
OP_STA , 0x23,
|
|
|
|
OP_EORA, 0x23,
|
|
|
|
OP_ADCA, 0x23,
|
|
|
|
OP_ORA , 0x23,
|
|
|
|
OP_ADDA, 0x23,
|
|
|
|
OP_CMPX, 0x23,
|
|
|
|
OP_JSR , 0x23,
|
|
|
|
OP_LDX , 0x23,
|
|
|
|
OP_STX , 0x23,
|
|
|
|
OP_SUBA, 0x34,
|
|
|
|
OP_CMPA, 0x34,
|
|
|
|
OP_SBCA, 0x34,
|
|
|
|
OP_SUBD, 0x34,
|
|
|
|
OP_ANDA, 0x34,
|
|
|
|
OP_BITA, 0x34,
|
|
|
|
OP_LDA , 0x34,
|
|
|
|
OP_STA , 0x34,
|
|
|
|
OP_EORA, 0x34,
|
|
|
|
OP_ADCA, 0x34,
|
|
|
|
OP_ORA , 0x34,
|
|
|
|
OP_ADDA, 0x34,
|
|
|
|
OP_CMPX, 0x34,
|
|
|
|
OP_JSR , 0x34,
|
|
|
|
OP_LDX , 0x34,
|
|
|
|
OP_STX , 0x34,
|
|
|
|
OP_SUBB, 0x21,
|
|
|
|
OP_CMPB, 0x21,
|
|
|
|
OP_SBCB, 0x21,
|
|
|
|
OP_ADDD, 0x31,
|
|
|
|
OP_ANDB, 0x21,
|
|
|
|
OP_BITB, 0x21,
|
|
|
|
OP_LDB , 0x21,
|
|
|
|
OP_XX , 0x11,
|
|
|
|
OP_EORB, 0x21,
|
|
|
|
OP_ADCB, 0x21,
|
|
|
|
OP_ORB , 0x21,
|
|
|
|
OP_ADDB, 0x21,
|
|
|
|
OP_LDD , 0x31,
|
|
|
|
OP_XX , 0x11,
|
|
|
|
OP_LDU , 0x31,
|
|
|
|
OP_XX , 0x10,
|
|
|
|
OP_SUBB, 0x22,
|
|
|
|
OP_CMPB, 0x22,
|
|
|
|
OP_SBCB, 0x22,
|
|
|
|
OP_ADDD, 0x22,
|
|
|
|
OP_ANDB, 0x22,
|
|
|
|
OP_BITB, 0x22,
|
|
|
|
OP_LDB , 0x22,
|
|
|
|
OP_STB , 0x22,
|
|
|
|
OP_EORB, 0x22,
|
|
|
|
OP_ADCB, 0x22,
|
|
|
|
OP_ORB , 0x22,
|
|
|
|
OP_ADDB, 0x22,
|
|
|
|
OP_LDD , 0x22,
|
|
|
|
OP_STD , 0x22,
|
|
|
|
OP_LDU , 0x22,
|
|
|
|
OP_STU , 0x22,
|
|
|
|
OP_SUBB, 0x23,
|
|
|
|
OP_CMPB, 0x23,
|
|
|
|
OP_SBCB, 0x23,
|
|
|
|
OP_ADDD, 0x23,
|
|
|
|
OP_ANDB, 0x23,
|
|
|
|
OP_BITB, 0x23,
|
|
|
|
OP_LDB , 0x23,
|
|
|
|
OP_STB , 0x23,
|
|
|
|
OP_EORB, 0x23,
|
|
|
|
OP_ADCB, 0x23,
|
|
|
|
OP_ORB , 0x23,
|
|
|
|
OP_ADDB, 0x23,
|
|
|
|
OP_LDD , 0x23,
|
|
|
|
OP_STD , 0x23,
|
|
|
|
OP_LDU , 0x23,
|
|
|
|
OP_STU , 0x23,
|
|
|
|
OP_SUBB, 0x34,
|
|
|
|
OP_CMPB, 0x34,
|
|
|
|
OP_SBCB, 0x34,
|
|
|
|
OP_ADDD, 0x34,
|
|
|
|
OP_ANDB, 0x34,
|
|
|
|
OP_BITB, 0x34,
|
|
|
|
OP_LDB , 0x34,
|
|
|
|
OP_STB , 0x34,
|
|
|
|
OP_EORB, 0x34,
|
|
|
|
OP_ADCB, 0x34,
|
|
|
|
OP_ORB , 0x34,
|
|
|
|
OP_ADDB, 0x34,
|
|
|
|
OP_LDD , 0x34,
|
|
|
|
OP_STD , 0x34,
|
|
|
|
OP_LDU , 0x34,
|
|
|
|
OP_STU , 0x34,
|
|
|
|
};
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
static const uint8_t map1[] PROGMEM = {
|
|
|
|
33, OP_LBRN, 0x46,
|
|
|
|
34, OP_LBHI, 0x46,
|
|
|
|
35, OP_LBLS, 0x46,
|
|
|
|
36, OP_LBCC, 0x46,
|
|
|
|
37, OP_LBLO, 0x46,
|
|
|
|
38, OP_LBNE, 0x46,
|
|
|
|
39, OP_LBEQ, 0x46,
|
|
|
|
40, OP_LBVC, 0x46,
|
|
|
|
41, OP_LBVS, 0x46,
|
|
|
|
42, OP_LBPL, 0x46,
|
|
|
|
43, OP_LBMI, 0x46,
|
|
|
|
44, OP_LBGE, 0x46,
|
|
|
|
45, OP_LBLT, 0x46,
|
|
|
|
46, OP_LBGT, 0x46,
|
|
|
|
47, OP_LBLE, 0x46,
|
|
|
|
63, OP_SWI2, 0x25,
|
|
|
|
131, OP_CMPD, 0x41,
|
|
|
|
140, OP_CMPY, 0x41,
|
|
|
|
142, OP_LDY , 0x41,
|
|
|
|
147, OP_CMPD, 0x32,
|
|
|
|
156, OP_CMPY, 0x32,
|
|
|
|
158, OP_LDY , 0x32,
|
|
|
|
159, OP_STY , 0x32,
|
|
|
|
163, OP_CMPD, 0x33,
|
|
|
|
172, OP_CMPY, 0x33,
|
|
|
|
174, OP_LDY , 0x33,
|
|
|
|
175, OP_STY , 0x33,
|
|
|
|
179, OP_CMPD, 0x44,
|
|
|
|
188, OP_CMPY, 0x44,
|
|
|
|
190, OP_LDY , 0x44,
|
|
|
|
191, OP_STY , 0x44,
|
|
|
|
206, OP_LDS , 0x41,
|
|
|
|
222, OP_LDS , 0x32,
|
|
|
|
223, OP_STS , 0x32,
|
|
|
|
238, OP_LDS , 0x33,
|
|
|
|
239, OP_STS , 0x33,
|
|
|
|
254, OP_LDS , 0x44,
|
|
|
|
255, OP_STS , 0x44,
|
2015-07-02 17:00:40 +00:00
|
|
|
};
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
static const uint8_t map2[] PROGMEM = {
|
|
|
|
63, OP_SWI3, 0x25,
|
|
|
|
131, OP_CMPU, 0x41,
|
|
|
|
140, OP_CMPS, 0x41,
|
|
|
|
147, OP_CMPU, 0x32,
|
|
|
|
156, OP_CMPS, 0x32,
|
|
|
|
163, OP_CMPU, 0x33,
|
|
|
|
172, OP_CMPS, 0x33,
|
|
|
|
179, OP_CMPU, 0x44,
|
|
|
|
188, OP_CMPS, 0x44,
|
2015-07-02 17:00:40 +00:00
|
|
|
255, OP_XX , 0x10
|
|
|
|
};
|
2015-07-02 14:35:05 +00:00
|
|
|
|
|
|
|
static const char regi[] = { 'X', 'Y', 'U', 'S' };
|
|
|
|
|
|
|
|
static const char *exgi[] = { "D", "X", "Y", "U", "S", "PC", "??", "??", "A",
|
2019-11-12 11:50:49 +00:00
|
|
|
"B", "CC", "DP", "??", "??", "??", "??" };
|
2015-07-02 14:35:05 +00:00
|
|
|
|
|
|
|
static const char *pshsregi[] = { "PC", "U", "Y", "X", "DP", "B", "A", "CC" };
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
static const char *pshuregi[] = { "PC", "S", "Y", "X", "DP", "B", "A", "CC" };
|
2015-07-02 14:35:05 +00:00
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
extern const char statusString[];
|
2015-07-02 14:35:05 +00:00
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
static uint8_t get_memb(addr_t addr) {
|
|
|
|
loadAddr(addr);
|
|
|
|
return readMemByteInc();
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
static uint16_t get_memw(addr_t addr) {
|
|
|
|
loadAddr(addr);
|
|
|
|
return (readMemByteInc() << 8) + readMemByteInc();
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
static char *strcc(char *ptr, uint8_t val) {
|
|
|
|
uint8_t i;
|
2015-07-02 14:35:05 +00:00
|
|
|
for (i = 0; i < 8; i++) {
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = (val & 0x80) ? statusString[i] : '.';
|
2015-07-02 14:35:05 +00:00
|
|
|
val <<= 1;
|
|
|
|
}
|
2019-11-12 11:50:49 +00:00
|
|
|
return ptr;
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
/* disassemble one instruction at address addr and return the address of the next instruction */
|
|
|
|
|
|
|
|
addr_t disassemble(addr_t addr) {
|
|
|
|
uint8_t d = get_memb(addr);
|
|
|
|
uint8_t s;
|
|
|
|
int8_t i;
|
|
|
|
uint8_t pb;
|
2015-07-02 14:35:05 +00:00
|
|
|
char reg;
|
2019-11-12 11:50:49 +00:00
|
|
|
char *ptr;
|
|
|
|
static char buffer[64];
|
|
|
|
const uint8_t *map = NULL;
|
2015-07-02 17:00:40 +00:00
|
|
|
|
|
|
|
// Default for most undefined opcodes
|
|
|
|
unsigned char sm = 0x10; // size_mode byte
|
|
|
|
unsigned char oi = OP_XX; // opcode index
|
2015-07-02 14:35:05 +00:00
|
|
|
|
2015-07-02 17:00:40 +00:00
|
|
|
if (d == 0x10) {
|
2019-11-12 11:50:49 +00:00
|
|
|
d = get_memb(addr + 1);
|
2015-07-02 17:00:40 +00:00
|
|
|
map = map1;
|
2019-11-12 11:50:49 +00:00
|
|
|
} else if (d == 0x11) {
|
2015-07-02 17:00:40 +00:00
|
|
|
d = get_memb(addr + 1);
|
|
|
|
map = map2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (map) {
|
|
|
|
// Search for the opcode in map1 or map2
|
|
|
|
map -= 3;
|
|
|
|
do {
|
|
|
|
map += 3;
|
2019-11-12 11:50:49 +00:00
|
|
|
s = pgm_read_byte(map);
|
|
|
|
if (s == d) {
|
|
|
|
oi = pgm_read_byte(++map);
|
|
|
|
sm = pgm_read_byte(++map);
|
|
|
|
break;
|
2015-07-02 17:00:40 +00:00
|
|
|
}
|
2019-11-12 11:50:49 +00:00
|
|
|
} while (s < 255);
|
2015-07-02 17:00:40 +00:00
|
|
|
} else {
|
|
|
|
// Lookup directly in map0
|
|
|
|
map = map0 + 2 * d;
|
2015-07-07 15:20:32 +00:00
|
|
|
oi = pgm_read_byte(map++);
|
|
|
|
sm = pgm_read_byte(map++);
|
2015-07-02 17:00:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
s = sm >> 4;
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
// 0123456789012345678901234567890123456789
|
|
|
|
// AAAA : HH HH HH HH : OOOO AAAAAAAAA
|
2015-07-02 17:00:40 +00:00
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
strfill(buffer, ' ', sizeof(buffer));
|
|
|
|
buffer[5] = ':';
|
|
|
|
buffer[19] = ':';
|
|
|
|
|
|
|
|
// Address
|
|
|
|
strhex4(buffer, addr);
|
|
|
|
|
|
|
|
// Hex
|
|
|
|
ptr = buffer + 7;
|
2015-07-02 17:00:40 +00:00
|
|
|
for (i = 0; i < s; i++) {
|
2019-11-12 11:50:49 +00:00
|
|
|
strhex2(ptr, get_memb(addr + i));
|
|
|
|
ptr += 3;
|
2015-07-02 17:00:40 +00:00
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
// Opcode
|
|
|
|
ptr = buffer + 21;
|
|
|
|
const char *ip = inst + oi * 4;
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
*ptr++ = pgm_read_byte(ip++);
|
|
|
|
}
|
|
|
|
ptr++;
|
2015-07-02 14:35:05 +00:00
|
|
|
|
2015-07-02 17:00:40 +00:00
|
|
|
switch(sm & 15) {
|
2015-07-02 14:35:05 +00:00
|
|
|
case 1: /* immediate */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = '#';
|
|
|
|
*ptr++ = '$';
|
|
|
|
if (s == 2) {
|
|
|
|
ptr = strhex2(ptr, get_memb(addr + 1));
|
|
|
|
} else {
|
|
|
|
ptr = strhex4(ptr, get_memw(addr + s - 2));
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
break;
|
|
|
|
case 2: /* direct */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex2(ptr, get_memb(addr + s - 1));
|
2015-07-02 14:35:05 +00:00
|
|
|
break;
|
|
|
|
case 3: /* indexed */
|
|
|
|
pb = get_memb(addr + s - 1);
|
|
|
|
reg = regi[(pb >> 5) & 0x03];
|
|
|
|
if (!(pb & 0x80)) { /* n4,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
if (pb & 0x10) {
|
|
|
|
*ptr++ = '-';
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex2(ptr, ((pb & 0x0f) ^ 0x0f) + 1);
|
|
|
|
} else {
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex2(ptr, pb & 0x0f);
|
|
|
|
}
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
} else {
|
|
|
|
if (pb & 0x10) {
|
|
|
|
*ptr++ = '[';
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
switch (pb & 0x0f) {
|
|
|
|
case 0: /* ,R+ */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
*ptr++ = '+';
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 1: /* ,R++ */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
*ptr++ = '+';
|
|
|
|
*ptr++ = '+';
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 2: /* ,-R */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = '-';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 3: /* ,--R */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = '-';
|
|
|
|
*ptr++ = '-';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 4: /* ,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 5: /* B,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = 'B';
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 6: /* A,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = 'A';
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 8: /* n7,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
s += 1;
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex2(ptr, get_memb(addr + s - 1));
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 9: /* n15,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
s += 2;
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex4(ptr, get_memw(addr + s - 2));
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 11: /* D,R */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = 'D';
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = reg;
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 12: /* n7,PCR */
|
2019-11-12 11:50:49 +00:00
|
|
|
s += 1;
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex2(ptr, get_memb(addr + s - 1));
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = 'P';
|
|
|
|
*ptr++ = 'C';
|
|
|
|
*ptr++ = 'R';
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 13: /* n15,PCR */
|
2019-11-12 11:50:49 +00:00
|
|
|
s += 2;
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex4(ptr, get_memw(addr + s - 2));
|
|
|
|
*ptr++ = ',';
|
|
|
|
*ptr++ = 'P';
|
|
|
|
*ptr++ = 'C';
|
|
|
|
*ptr++ = 'R';
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 15: /* [n] */
|
2019-11-12 11:50:49 +00:00
|
|
|
s += 2;
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex4(ptr, get_memw(addr + s - 2));
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
default:
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = '?';
|
|
|
|
*ptr++ = '?';
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (pb & 0x10) {
|
|
|
|
*ptr++ = ']';
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 4: /* extended */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex4(ptr, get_memw(addr + s - 2));
|
2015-07-02 14:35:05 +00:00
|
|
|
break;
|
|
|
|
case 5: /* inherent */
|
|
|
|
pb = get_memb(addr + 1);
|
|
|
|
switch (d) {
|
|
|
|
case 0x1e: case 0x1f: /* exg tfr */
|
2019-11-12 11:50:49 +00:00
|
|
|
ptr = strinsert(ptr, exgi[(pb >> 4) & 0x0f]);
|
|
|
|
*ptr++ = ',';
|
|
|
|
ptr = strinsert(ptr, exgi[pb & 0x0f]);
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 0x1a: case 0x1c: case 0x3c: /* orcc andcc cwai */
|
2019-11-12 11:50:49 +00:00
|
|
|
*ptr++ = '#';
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex2(ptr, pb);
|
|
|
|
*ptr++ = '=';
|
|
|
|
ptr = strcc(ptr, pb);
|
2015-07-02 14:35:05 +00:00
|
|
|
break;
|
|
|
|
case 0x34: /* pshs */
|
|
|
|
{
|
2019-11-12 11:50:49 +00:00
|
|
|
int p = 0;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
if (pb & 0x80) {
|
|
|
|
if (p) {
|
|
|
|
*ptr++ = ',';
|
|
|
|
}
|
|
|
|
ptr = strinsert(ptr, pshsregi[i]);
|
|
|
|
p = 1;
|
|
|
|
}
|
|
|
|
pb <<= 1;
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x35: /* puls */
|
|
|
|
{
|
2019-11-12 11:50:49 +00:00
|
|
|
int p = 0;
|
|
|
|
for (i = 7; i >= 0; i--) {
|
|
|
|
if (pb & 0x01) {
|
|
|
|
if (p) {
|
|
|
|
*ptr++ = ',';
|
|
|
|
}
|
|
|
|
ptr = strinsert(ptr, pshsregi[i]);
|
|
|
|
p = 1;
|
|
|
|
}
|
|
|
|
pb >>= 1;
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x36: /* pshu */
|
|
|
|
{
|
2019-11-12 11:50:49 +00:00
|
|
|
int p = 0;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
|
if (pb & 0x80) {
|
|
|
|
if (p) {
|
|
|
|
*ptr++ = ',';
|
|
|
|
}
|
|
|
|
ptr = strinsert(ptr, pshuregi[i]);
|
|
|
|
p = 1;
|
|
|
|
}
|
|
|
|
pb <<= 1;
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x37: /* pulu */
|
|
|
|
{
|
2019-11-12 11:50:49 +00:00
|
|
|
int p = 0;
|
|
|
|
for (i = 7; i >= 0; i--) {
|
|
|
|
if (pb & 0x01) {
|
|
|
|
if (p) {
|
|
|
|
*ptr++ = ',';
|
|
|
|
}
|
|
|
|
ptr = strinsert(ptr, pshuregi[i]);
|
|
|
|
p = 1;
|
|
|
|
}
|
|
|
|
pb >>= 1;
|
|
|
|
}
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2019-11-12 11:50:49 +00:00
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
case 6: /* relative */
|
|
|
|
{
|
2019-11-12 11:50:49 +00:00
|
|
|
int16_t v;
|
|
|
|
if (s == 2) {
|
|
|
|
v = (int16_t)(int8_t)get_memb(addr + 1);
|
|
|
|
} else {
|
|
|
|
v = (int16_t)get_memw(addr + s - 2);
|
|
|
|
}
|
|
|
|
*ptr++ = '$';
|
|
|
|
ptr = strhex4(ptr, addr + (uint16_t)s + v);
|
|
|
|
}
|
|
|
|
break;
|
2015-07-02 14:35:05 +00:00
|
|
|
}
|
|
|
|
|
2019-11-12 11:50:49 +00:00
|
|
|
// Get rid of trailing white space
|
|
|
|
while (*(--ptr) == ' ');
|
|
|
|
ptr++;
|
|
|
|
|
|
|
|
// Add a newline and terminate the string
|
|
|
|
*ptr++ = '\n';
|
|
|
|
*ptr++ = '\0';
|
|
|
|
|
|
|
|
// Log using the normal (data memory) string logger
|
|
|
|
logs(buffer);
|
|
|
|
|
|
|
|
// Return the address of the next instruction
|
2015-07-02 14:35:05 +00:00
|
|
|
return addr + s;
|
|
|
|
}
|