The GODIL contains 1K5 pull-ups to +5V on all pins. This can raise the logic zero threshold of inputs driving the ICE module, and which can result in reduced noise margin. See the ICE-T80 for more information on the type of problem this can cause on real systems. The XC6SLX9 based implementation with the active level shifters overcomes this issue.
Future Work
Make cycle counter a 32 bit counter, and have some way to set a non-default clock speed, and maybe toggle between cycles and seconds.