2021-03-18 03:38:55 +00:00
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//
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// ZXSpectrum.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 17/03/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#include "ZXSpectrum.hpp"
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2021-03-18 16:47:48 +00:00
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#include "Video.hpp"
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2021-03-18 16:14:48 +00:00
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#define LOG_PREFIX "[Spectrum] "
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2021-03-23 14:32:22 +00:00
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#include "../../../Activity/Source.hpp"
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2021-03-18 03:38:55 +00:00
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#include "../../MachineTypes.hpp"
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2021-03-18 14:43:51 +00:00
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#include "../../../Processors/Z80/Z80.hpp"
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2021-03-18 16:14:48 +00:00
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#include "../../../Components/AudioToggle/AudioToggle.hpp"
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#include "../../../Components/AY38910/AY38910.hpp"
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2021-03-22 23:36:05 +00:00
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// TODO: possibly there's a better factoring than this, but for now
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// just grab the CPC's version of an FDC.
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#include "../../AmstradCPC/FDC.hpp"
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2021-03-18 16:14:48 +00:00
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#include "../../../Outputs/Log.hpp"
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#include "../../../Outputs/Speaker/Implementation/CompoundSource.hpp"
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#include "../../../Outputs/Speaker/Implementation/LowpassSpeaker.hpp"
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#include "../../../Outputs/Speaker/Implementation/SampleSource.hpp"
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2021-03-22 23:04:38 +00:00
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#include "../../../Storage/Tape/Tape.hpp"
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#include "../../../Storage/Tape/Parsers/Spectrum.hpp"
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2021-03-18 14:18:17 +00:00
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#include "../../../Analyser/Static/ZXSpectrum/Target.hpp"
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2021-03-18 03:38:55 +00:00
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2021-03-19 03:07:51 +00:00
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#include "../../Utility/MemoryFuzzer.hpp"
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2021-03-23 14:44:43 +00:00
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#include "../../Utility/Typer.hpp"
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2021-03-19 03:07:51 +00:00
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2021-03-18 16:47:48 +00:00
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#include "../../../ClockReceiver/JustInTime.hpp"
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2021-04-05 02:39:30 +00:00
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#include "../../../Processors/Z80/State/State.hpp"
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2021-03-19 14:36:08 +00:00
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#include "../Keyboard/Keyboard.hpp"
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2021-03-18 14:18:17 +00:00
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2021-03-19 03:51:21 +00:00
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#include <array>
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2021-03-18 14:18:17 +00:00
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namespace Sinclair {
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namespace ZXSpectrum {
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using Model = Analyser::Static::ZXSpectrum::Target::Model;
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2021-03-23 14:44:43 +00:00
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using CharacterMapper = Sinclair::ZX::Keyboard::CharacterMapper;
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2021-03-18 14:18:17 +00:00
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template<Model model> class ConcreteMachine:
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2021-03-23 14:32:22 +00:00
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public Activity::Source,
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2021-03-23 20:38:04 +00:00
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public ClockingHint::Observer,
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2021-03-20 02:17:20 +00:00
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public Configurable::Device,
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2021-03-23 14:44:43 +00:00
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public CPU::Z80::BusHandler,
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2021-03-18 14:43:51 +00:00
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public Machine,
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2021-03-20 03:33:46 +00:00
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public MachineTypes::AudioProducer,
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2021-03-19 03:51:21 +00:00
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public MachineTypes::MappedKeyboardMachine,
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2021-03-19 15:12:50 +00:00
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public MachineTypes::MediaTarget,
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2021-03-18 14:18:17 +00:00
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public MachineTypes::ScanProducer,
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public MachineTypes::TimedMachine,
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2021-03-23 14:44:43 +00:00
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public Utility::TypeRecipient<CharacterMapper> {
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2021-03-18 14:18:17 +00:00
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public:
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2021-03-18 14:43:51 +00:00
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ConcreteMachine(const Analyser::Static::ZXSpectrum::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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2021-03-23 14:44:43 +00:00
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Utility::TypeRecipient<CharacterMapper>(Sinclair::ZX::Keyboard::Machine::ZXSpectrum),
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2021-03-18 16:14:48 +00:00
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z80_(*this),
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ay_(GI::AY38910::Personality::AY38910, audio_queue_),
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audio_toggle_(audio_queue_),
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mixer_(ay_, audio_toggle_),
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2021-03-19 03:51:21 +00:00
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speaker_(mixer_),
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2021-03-19 14:36:08 +00:00
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keyboard_(Sinclair::ZX::Keyboard::Machine::ZXSpectrum),
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2021-03-19 15:12:50 +00:00
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keyboard_mapper_(Sinclair::ZX::Keyboard::Machine::ZXSpectrum),
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2021-03-22 23:36:05 +00:00
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tape_player_(clock_rate() * 2),
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fdc_(clock_rate() * 2)
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2021-03-18 14:18:17 +00:00
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{
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2021-03-18 16:41:24 +00:00
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set_clock_rate(clock_rate());
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speaker_.set_input_rate(float(clock_rate()) / 2.0f);
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2021-03-18 14:18:17 +00:00
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// With only the +2a and +3 currently supported, the +3 ROM is always
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// the one required.
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2021-04-15 01:37:10 +00:00
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std::vector<ROMMachine::ROM> rom_names;
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const std::string machine = "ZXSpectrum";
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switch(model) {
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case Model::SixteenK:
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case Model::FortyEightK:
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rom_names.emplace_back(machine, "the 48kb ROM", "48.rom", 16 * 1024, 0xddee531f);
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break;
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case Model::OneTwoEightK:
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rom_names.emplace_back(machine, "the 128kb ROM", "128.rom", 32 * 1024, 0x2cbe8995);
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break;
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case Model::Plus2:
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rom_names.emplace_back(machine, "the +2 ROM", "plus2.rom", 32 * 1024, 0xe7a517dc);
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break;
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case Model::Plus2a:
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case Model::Plus3: {
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const std::initializer_list<uint32_t> crc32s = { 0x96e3c17a, 0xbe0d9ec4 };
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rom_names.emplace_back(machine, "the +2a/+3 ROM", "plus3.rom", 64 * 1024, crc32s);
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} break;
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}
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const auto roms = rom_fetcher(rom_names);
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2021-03-18 14:18:17 +00:00
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if(!roms[0]) throw ROMMachine::Error::MissingROMs;
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memcpy(rom_.data(), roms[0]->data(), std::min(rom_.size(), roms[0]->size()));
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2021-03-23 20:38:04 +00:00
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// Register for sleeping notifications.
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tape_player_.set_clocking_hint_observer(this);
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2021-03-18 14:43:51 +00:00
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// Set up initial memory map.
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update_memory_map();
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2021-03-22 00:23:00 +00:00
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set_video_address();
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2021-03-19 03:07:51 +00:00
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Memory::Fuzz(ram_);
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2021-03-18 14:43:51 +00:00
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2021-03-19 15:12:50 +00:00
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// Insert media.
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insert_media(target.media);
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2021-03-23 00:12:03 +00:00
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// Possibly depress the enter key.
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if(target.should_hold_enter) {
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// Hold it for five seconds, more or less.
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duration_to_press_enter_ = Cycles(5 * clock_rate());
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keyboard_.set_key_state(ZX::Keyboard::KeyEnter, true);
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}
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2021-03-18 14:18:17 +00:00
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}
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2021-03-18 16:23:54 +00:00
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~ConcreteMachine() {
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audio_queue_.flush();
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}
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2021-03-18 16:41:24 +00:00
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static constexpr unsigned int clock_rate() {
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2021-04-15 01:37:10 +00:00
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constexpr unsigned int OriginalClockRate = 3'500'000;
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2021-03-20 15:19:44 +00:00
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constexpr unsigned int Plus3ClockRate = 3'546'875; // See notes below; this is a guess.
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// Notes on timing for the +2a and +3:
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//
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// Standard PAL produces 283.7516 colour cycles per line, each line being 64µs.
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// The oft-quoted 3.5469 Mhz would seem to imply 227.0016 clock cycles per line.
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// Since those Spectrums actually produce 228 cycles per line, but software like
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// Chromatrons seems to assume a fixed phase relationship, I guess that the real
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// clock speed is whatever gives:
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//
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// 228 / [cycles per line] * 283.7516 = [an integer].
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//
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// i.e. 228 * 283.7516 = [an integer] * [cycles per line], such that cycles per line ~= 227
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// ... which would imply that 'an integer' is probably 285, i.e.
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//
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// 228 / [cycles per line] * 283.7516 = 285
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// => 227.00128 = [cycles per line]
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// => clock rate = 3.546895 Mhz?
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//
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// That is... unless I'm mistaken about the PAL colour subcarrier and it's actually 283.75,
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// which would give exactly 227 cycles/line and therefore 3.546875 Mhz.
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//
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// A real TV would be likely to accept either, I guess. But it does seem like
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// the Spectrum is a PAL machine with a fixed colour phase relationship. For
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// this emulator's world, that's a first!
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2021-04-15 01:37:10 +00:00
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return model < Model::OneTwoEightK ? OriginalClockRate : Plus3ClockRate;
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2021-03-18 16:41:24 +00:00
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}
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2021-03-23 20:38:04 +00:00
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// MARK: - TimedMachine.
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2021-03-18 14:18:17 +00:00
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void run_for(const Cycles cycles) override {
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2021-03-18 14:43:51 +00:00
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z80_.run_for(cycles);
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2021-03-23 00:12:03 +00:00
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// Use this very broad timing base for the automatic enter depression.
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// It's not worth polluting the main loop.
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if(duration_to_press_enter_ > Cycles(0)) {
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if(duration_to_press_enter_ < cycles) {
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duration_to_press_enter_ = Cycles(0);
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keyboard_.set_key_state(ZX::Keyboard::KeyEnter, false);
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} else {
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duration_to_press_enter_ -= cycles;
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}
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}
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2021-03-18 14:18:17 +00:00
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}
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2021-03-18 16:23:54 +00:00
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void flush() {
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2021-03-19 01:29:52 +00:00
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video_.flush();
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2021-03-18 16:23:54 +00:00
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update_audio();
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audio_queue_.perform();
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2021-03-22 23:36:05 +00:00
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if constexpr (model == Model::Plus3) {
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fdc_.flush();
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}
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2021-03-18 16:23:54 +00:00
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}
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2021-03-23 20:38:04 +00:00
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// MARK: - ScanProducer.
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2021-03-18 14:18:17 +00:00
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2021-03-20 02:17:20 +00:00
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void set_scan_target(Outputs::Display::ScanTarget *scan_target) override {
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2021-03-19 01:54:42 +00:00
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video_->set_scan_target(scan_target);
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2021-03-18 14:18:17 +00:00
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}
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2021-03-20 02:17:20 +00:00
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Outputs::Display::ScanStatus get_scaled_scan_status() const override {
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2021-03-19 01:54:42 +00:00
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return video_->get_scaled_scan_status();
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2021-03-18 14:18:17 +00:00
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}
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2021-03-20 02:17:20 +00:00
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void set_display_type(Outputs::Display::DisplayType display_type) override {
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video_->set_display_type(display_type);
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}
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2021-03-23 20:38:04 +00:00
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// MARK: - BusHandler.
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2021-03-18 14:43:51 +00:00
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forceinline HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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2021-03-22 03:04:20 +00:00
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using PartialMachineCycle = CPU::Z80::PartialMachineCycle;
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2021-03-18 16:14:48 +00:00
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2021-03-22 03:04:20 +00:00
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const uint16_t address = cycle.address ? *cycle.address : 0x0000;
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2021-04-04 23:52:38 +00:00
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// Apply contention if necessary.
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2021-04-15 01:37:10 +00:00
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if constexpr (model >= Model::Plus2a) {
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2021-04-15 22:04:16 +00:00
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// Model applied: the trigger for the ULA inserting a delay is the falling edge
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// of MREQ, which is always half a cycle into a read or write.
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2021-04-15 01:37:10 +00:00
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if(
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is_contended_[address >> 14] &&
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cycle.operation >= PartialMachineCycle::ReadOpcodeStart &&
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cycle.operation <= PartialMachineCycle::WriteStart) {
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const HalfCycles delay = video_.last_valid()->access_delay(video_.time_since_flush() + HalfCycles(1));
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advance(cycle.length + delay);
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return delay;
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}
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} else {
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2021-04-15 22:04:16 +00:00
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switch(cycle.operation) {
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2021-04-18 15:56:00 +00:00
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case CPU::Z80::PartialMachineCycle::Input:
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case CPU::Z80::PartialMachineCycle::Output:
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case CPU::Z80::PartialMachineCycle::Read:
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case CPU::Z80::PartialMachineCycle::Write:
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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case CPU::Z80::PartialMachineCycle::Interrupt:
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// For these, carry on into the actual handler, below.
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break;
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// For anything else that isn't listed below, just advance
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// time and conclude here.
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2021-04-15 22:04:16 +00:00
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default:
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advance(cycle.length);
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return HalfCycles(0);
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2021-04-15 22:57:34 +00:00
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case CPU::Z80::PartialMachineCycle::InputStart:
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case CPU::Z80::PartialMachineCycle::OutputStart: {
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// The port address is loaded prior to IOREQ being visible; a contention
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// always occurs if it is in the $4000–$8000 range regardless of current
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// memory mapping.
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HalfCycles delay;
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HalfCycles time = video_.time_since_flush() + HalfCycles(1);
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if((address & 0xc000) == 0x4000) {
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for(int c = 0; c < ((address & 1) ? 4 : 2); c++) {
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const auto next_delay = video_.last_valid()->access_delay(time);
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delay += next_delay;
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time += next_delay + 2;
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}
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} else {
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if(!(address & 1)) {
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|
|
|
delay = video_.last_valid()->access_delay(time + HalfCycles(2));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
advance(cycle.length + delay);
|
|
|
|
|
return delay;
|
2021-04-18 15:56:00 +00:00
|
|
|
|
} break;
|
2021-04-15 22:57:34 +00:00
|
|
|
|
|
2021-04-15 22:04:16 +00:00
|
|
|
|
case PartialMachineCycle::ReadOpcodeStart:
|
|
|
|
|
case PartialMachineCycle::ReadStart:
|
2021-04-15 22:57:34 +00:00
|
|
|
|
case PartialMachineCycle::WriteStart: {
|
|
|
|
|
// These all start by loading the address bus, then set MREQ
|
|
|
|
|
// half a cycle later.
|
|
|
|
|
if(is_contended_[address >> 14]) {
|
|
|
|
|
const HalfCycles delay = video_.last_valid()->access_delay(video_.time_since_flush() + HalfCycles(1));
|
|
|
|
|
|
|
|
|
|
advance(cycle.length + delay);
|
|
|
|
|
return delay;
|
|
|
|
|
}
|
2021-04-18 15:56:00 +00:00
|
|
|
|
} break;
|
2021-04-15 22:04:16 +00:00
|
|
|
|
|
2021-04-15 22:57:34 +00:00
|
|
|
|
case PartialMachineCycle::Internal: {
|
|
|
|
|
// Whatever's on the address bus will remain there, without IOREQ or
|
|
|
|
|
// MREQ interceding, for this entire bus cycle. So apply contentions
|
|
|
|
|
// all the way along.
|
|
|
|
|
if(is_contended_[address >> 14]) {
|
|
|
|
|
const auto half_cycles = cycle.length.as<int>();
|
|
|
|
|
assert(!(half_cycles & 1));
|
|
|
|
|
|
|
|
|
|
HalfCycles time = video_.time_since_flush() + HalfCycles(1);
|
|
|
|
|
HalfCycles delay;
|
|
|
|
|
for(int c = 0; c < half_cycles; c += 2) {
|
|
|
|
|
const auto next_delay = video_.last_valid()->access_delay(time);
|
|
|
|
|
delay += next_delay;
|
|
|
|
|
time += next_delay + 2;
|
|
|
|
|
}
|
2021-04-15 22:04:16 +00:00
|
|
|
|
|
2021-04-15 23:17:11 +00:00
|
|
|
|
advance(cycle.length + delay);
|
2021-04-15 22:57:34 +00:00
|
|
|
|
return delay;
|
|
|
|
|
}
|
2021-04-18 15:56:00 +00:00
|
|
|
|
} break;
|
2021-04-15 22:04:16 +00:00
|
|
|
|
}
|
2021-04-01 02:52:41 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-04-04 23:52:38 +00:00
|
|
|
|
// For all other machine cycles, model the action as happening at the end of the machine cycle;
|
|
|
|
|
// that means advancing time now.
|
|
|
|
|
advance(cycle.length);
|
2021-04-01 02:52:41 +00:00
|
|
|
|
|
2021-03-18 16:14:48 +00:00
|
|
|
|
switch(cycle.operation) {
|
|
|
|
|
default: break;
|
2021-03-22 03:04:20 +00:00
|
|
|
|
|
|
|
|
|
case PartialMachineCycle::ReadOpcode:
|
2021-03-22 23:04:38 +00:00
|
|
|
|
// Fast loading: ROM version.
|
|
|
|
|
//
|
2021-04-05 02:39:30 +00:00
|
|
|
|
// The below patches over part of the 'LD-BYTES' routine from the 48kb ROM.
|
2021-04-15 21:31:42 +00:00
|
|
|
|
if(use_fast_tape_hack_ && address == 0x056b && read_pointers_[0] == &rom_[classic_rom_offset()]) {
|
2021-04-05 02:39:30 +00:00
|
|
|
|
// Stop pressing enter, if neccessry.
|
|
|
|
|
if(duration_to_press_enter_ > Cycles(0)) {
|
|
|
|
|
duration_to_press_enter_ = Cycles(0);
|
|
|
|
|
keyboard_.set_key_state(ZX::Keyboard::KeyEnter, false);
|
|
|
|
|
}
|
2021-03-23 02:42:10 +00:00
|
|
|
|
|
2021-04-05 02:39:30 +00:00
|
|
|
|
if(perform_rom_ld_bytes_56b()) {
|
2021-03-22 23:04:38 +00:00
|
|
|
|
*cycle.value = 0xc9; // i.e. RET.
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-22 03:04:20 +00:00
|
|
|
|
case PartialMachineCycle::Read:
|
2021-04-16 01:19:21 +00:00
|
|
|
|
if constexpr (model == Model::SixteenK) {
|
|
|
|
|
// Assumption: with nothing mapped above 0x8000 on the 16kb Spectrum,
|
|
|
|
|
// read the floating bus.
|
|
|
|
|
if(address >= 0x8000) {
|
|
|
|
|
*cycle.value = video_->get_floating_value();
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-18 16:14:48 +00:00
|
|
|
|
*cycle.value = read_pointers_[address >> 14][address];
|
2021-03-25 00:23:33 +00:00
|
|
|
|
|
2021-04-16 01:13:06 +00:00
|
|
|
|
if constexpr (model >= Model::Plus2a) {
|
|
|
|
|
if(is_contended_[address >> 14]) {
|
|
|
|
|
video_->set_last_contended_area_access(*cycle.value);
|
|
|
|
|
}
|
2021-03-25 00:23:33 +00:00
|
|
|
|
}
|
2021-03-18 16:14:48 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case PartialMachineCycle::Write:
|
2021-03-22 13:02:49 +00:00
|
|
|
|
// Flush video if this access modifies screen contents.
|
2021-03-22 19:46:02 +00:00
|
|
|
|
if(is_video_[address >> 14] && (address & 0x3fff) < 6912) {
|
2021-03-22 13:02:49 +00:00
|
|
|
|
video_.flush();
|
|
|
|
|
}
|
2021-03-25 00:23:33 +00:00
|
|
|
|
|
2021-03-18 16:14:48 +00:00
|
|
|
|
write_pointers_[address >> 14][address] = *cycle.value;
|
2021-03-25 00:23:33 +00:00
|
|
|
|
|
2021-04-16 01:13:06 +00:00
|
|
|
|
if constexpr (model >= Model::Plus2a) {
|
|
|
|
|
// Fill the floating bus buffer if this write is within the contended area.
|
|
|
|
|
if(is_contended_[address >> 14]) {
|
|
|
|
|
video_->set_last_contended_area_access(*cycle.value);
|
|
|
|
|
}
|
2021-03-25 00:23:33 +00:00
|
|
|
|
}
|
2021-03-18 16:14:48 +00:00
|
|
|
|
break;
|
|
|
|
|
|
2021-04-17 01:54:52 +00:00
|
|
|
|
// Partial port decodings here and in ::Input are as documented
|
|
|
|
|
// at https://worldofspectrum.org/faq/reference/ports.htm
|
|
|
|
|
|
2021-03-18 16:14:48 +00:00
|
|
|
|
case PartialMachineCycle::Output:
|
2021-03-18 16:41:24 +00:00
|
|
|
|
// Test for port FE.
|
2021-03-18 16:14:48 +00:00
|
|
|
|
if(!(address&1)) {
|
2021-03-18 16:23:54 +00:00
|
|
|
|
update_audio();
|
|
|
|
|
audio_toggle_.set_output(*cycle.value & 0x10);
|
2021-03-18 16:32:54 +00:00
|
|
|
|
|
2021-03-19 02:29:24 +00:00
|
|
|
|
video_->set_border_colour(*cycle.value & 7);
|
|
|
|
|
|
2021-03-18 16:32:54 +00:00
|
|
|
|
// b0–b2: border colour
|
|
|
|
|
// b3: enable tape input (?)
|
|
|
|
|
// b4: tape and speaker output
|
2021-03-18 16:14:48 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-22 23:36:05 +00:00
|
|
|
|
// Test for classic 128kb paging register (i.e. port 7ffd).
|
2021-04-17 01:54:52 +00:00
|
|
|
|
if (
|
|
|
|
|
(model >= Model::OneTwoEightK && model <= Model::Plus2 && (address & 0x8002) == 0x0000) ||
|
|
|
|
|
(model >= Model::Plus2a && (address & 0xc002) == 0x4000)
|
|
|
|
|
) {
|
|
|
|
|
port7ffd_ = *cycle.value;
|
|
|
|
|
update_memory_map();
|
|
|
|
|
|
|
|
|
|
// Set the proper video base pointer.
|
|
|
|
|
set_video_address();
|
|
|
|
|
|
|
|
|
|
// Potentially lock paging, _after_ the current
|
|
|
|
|
// port values have taken effect.
|
|
|
|
|
disable_paging_ |= *cycle.value & 0x20;
|
2021-03-22 00:23:00 +00:00
|
|
|
|
}
|
2021-03-18 16:41:24 +00:00
|
|
|
|
|
2021-03-22 23:36:05 +00:00
|
|
|
|
// Test for +2a/+3 paging (i.e. port 1ffd).
|
2021-04-15 01:37:10 +00:00
|
|
|
|
if constexpr (model >= Model::Plus2a) {
|
|
|
|
|
if((address & 0xf002) == 0x1000) {
|
|
|
|
|
port1ffd_ = *cycle.value;
|
|
|
|
|
update_memory_map();
|
|
|
|
|
update_video_base();
|
|
|
|
|
|
|
|
|
|
if constexpr (model == Model::Plus3) {
|
|
|
|
|
fdc_->set_motor_on(*cycle.value & 0x08);
|
|
|
|
|
}
|
2021-03-22 23:36:05 +00:00
|
|
|
|
}
|
2021-03-22 00:23:00 +00:00
|
|
|
|
}
|
2021-03-18 16:41:24 +00:00
|
|
|
|
|
2021-04-15 22:04:16 +00:00
|
|
|
|
// Route to the AY if one is fitted.
|
2021-04-15 01:37:10 +00:00
|
|
|
|
if constexpr (model >= Model::OneTwoEightK) {
|
2021-04-17 01:54:52 +00:00
|
|
|
|
switch(address & 0xc002) {
|
|
|
|
|
case 0xc000:
|
|
|
|
|
// Select AY register.
|
|
|
|
|
update_audio();
|
|
|
|
|
GI::AY38910::Utility::select_register(ay_, *cycle.value);
|
|
|
|
|
break;
|
2021-03-22 01:03:35 +00:00
|
|
|
|
|
2021-04-17 01:54:52 +00:00
|
|
|
|
case 0x8000:
|
|
|
|
|
// Write to AY register.
|
|
|
|
|
update_audio();
|
|
|
|
|
GI::AY38910::Utility::write_data(ay_, *cycle.value);
|
|
|
|
|
break;
|
2021-04-15 01:37:10 +00:00
|
|
|
|
}
|
2021-03-18 16:14:48 +00:00
|
|
|
|
}
|
2021-03-22 13:15:00 +00:00
|
|
|
|
|
2021-04-15 22:04:16 +00:00
|
|
|
|
// Check for FDC accesses.
|
2021-03-22 13:15:00 +00:00
|
|
|
|
if constexpr (model == Model::Plus3) {
|
2021-04-17 01:54:52 +00:00
|
|
|
|
switch(address & 0xf002) {
|
2021-03-22 13:15:00 +00:00
|
|
|
|
default: break;
|
2021-04-17 01:54:52 +00:00
|
|
|
|
case 0x3000: case 0x2000:
|
2021-03-22 23:36:05 +00:00
|
|
|
|
fdc_->write((address >> 12) & 1, *cycle.value);
|
2021-03-22 13:15:00 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
2021-03-18 16:14:48 +00:00
|
|
|
|
break;
|
|
|
|
|
|
2021-04-16 01:19:21 +00:00
|
|
|
|
case PartialMachineCycle::Input: {
|
|
|
|
|
bool did_match = false;
|
2021-03-19 03:14:39 +00:00
|
|
|
|
*cycle.value = 0xff;
|
|
|
|
|
|
2021-03-18 16:14:48 +00:00
|
|
|
|
if(!(address&1)) {
|
2021-04-16 01:19:21 +00:00
|
|
|
|
did_match = true;
|
|
|
|
|
|
2021-03-19 15:12:50 +00:00
|
|
|
|
// Port FE:
|
|
|
|
|
//
|
2021-03-18 16:32:54 +00:00
|
|
|
|
// address b8+: mask of keyboard lines to select
|
|
|
|
|
// result: b0–b4: mask of keys pressed
|
|
|
|
|
// b6: tape input
|
2021-03-19 15:12:50 +00:00
|
|
|
|
|
|
|
|
|
*cycle.value &= keyboard_.read(address);
|
|
|
|
|
*cycle.value &= tape_player_.get_input() ? 0xbf : 0xff;
|
2021-03-20 02:43:48 +00:00
|
|
|
|
|
|
|
|
|
// If this read is within 200 cycles of the previous,
|
|
|
|
|
// count it as an adjacent hit; if 20 of those have
|
|
|
|
|
// occurred then start the tape motor.
|
|
|
|
|
if(use_automatic_tape_motor_control_) {
|
|
|
|
|
if(cycles_since_tape_input_read_ < HalfCycles(400)) {
|
|
|
|
|
++recent_tape_hits_;
|
|
|
|
|
|
|
|
|
|
if(recent_tape_hits_ == 20) {
|
|
|
|
|
tape_player_.set_motor_control(true);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
recent_tape_hits_ = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
cycles_since_tape_input_read_ = HalfCycles(0);
|
|
|
|
|
}
|
2021-03-18 16:14:48 +00:00
|
|
|
|
}
|
2021-03-18 16:23:54 +00:00
|
|
|
|
|
2021-04-15 22:04:16 +00:00
|
|
|
|
if constexpr (model >= Model::OneTwoEightK) {
|
|
|
|
|
if((address & 0xc002) == 0xc000) {
|
2021-04-16 01:19:21 +00:00
|
|
|
|
did_match = true;
|
|
|
|
|
|
2021-04-15 22:04:16 +00:00
|
|
|
|
// Read from AY register.
|
|
|
|
|
update_audio();
|
|
|
|
|
*cycle.value &= GI::AY38910::Utility::read(ay_);
|
|
|
|
|
}
|
2021-03-18 16:23:54 +00:00
|
|
|
|
}
|
2021-03-22 23:36:05 +00:00
|
|
|
|
|
2021-04-15 22:04:16 +00:00
|
|
|
|
if constexpr (model >= Model::Plus2a) {
|
|
|
|
|
// Check for a +2a/+3 floating bus read; these are particularly arcane.
|
|
|
|
|
// See footnote to https://spectrumforeveryone.com/technical/memory-contention-floating-bus/
|
|
|
|
|
// and, much more rigorously, http://sky.relative-path.com/zx/floating_bus.html
|
|
|
|
|
if(!disable_paging_ && (address & 0xf003) == 0x0001) {
|
|
|
|
|
*cycle.value &= video_->get_floating_value();
|
|
|
|
|
}
|
2021-03-23 21:09:42 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-22 23:36:05 +00:00
|
|
|
|
if constexpr (model == Model::Plus3) {
|
2021-04-17 01:54:52 +00:00
|
|
|
|
switch(address & 0xf002) {
|
2021-03-22 23:36:05 +00:00
|
|
|
|
default: break;
|
2021-04-17 01:54:52 +00:00
|
|
|
|
case 0x3000: case 0x2000:
|
2021-03-22 23:36:05 +00:00
|
|
|
|
*cycle.value &= fdc_->read((address >> 12) & 1);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
2021-04-16 01:19:21 +00:00
|
|
|
|
|
2021-04-17 01:54:52 +00:00
|
|
|
|
if constexpr (model <= Model::Plus2) {
|
2021-04-16 01:19:21 +00:00
|
|
|
|
if(!did_match) {
|
|
|
|
|
*cycle.value = video_->get_floating_value();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
} break;
|
2021-04-18 15:56:00 +00:00
|
|
|
|
|
|
|
|
|
case PartialMachineCycle::Interrupt:
|
|
|
|
|
// At least one piece of Spectrum software, Escape from M.O.N.J.A.S. explicitly
|
|
|
|
|
// assumes that a 0xff value will be on the bus during an interrupt acknowledgment.
|
|
|
|
|
// I wasn't otherwise aware that this value is reliable.
|
|
|
|
|
*cycle.value = 0xff;
|
|
|
|
|
break;
|
2021-03-18 16:14:48 +00:00
|
|
|
|
}
|
2021-03-18 14:43:51 +00:00
|
|
|
|
|
2021-04-01 02:52:41 +00:00
|
|
|
|
return HalfCycles(0);
|
2021-03-18 14:43:51 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-19 12:49:56 +00:00
|
|
|
|
private:
|
|
|
|
|
void advance(HalfCycles duration) {
|
|
|
|
|
time_since_audio_update_ += duration;
|
|
|
|
|
|
|
|
|
|
video_ += duration;
|
|
|
|
|
if(video_.did_flush()) {
|
2021-04-06 16:06:13 +00:00
|
|
|
|
z80_.set_interrupt_line(video_.last_valid()->get_interrupt_line(), video_.last_sequence_point_overrun());
|
2021-03-19 12:49:56 +00:00
|
|
|
|
}
|
2021-03-19 15:12:50 +00:00
|
|
|
|
|
2021-03-23 20:38:04 +00:00
|
|
|
|
if(!tape_player_is_sleeping_) tape_player_.run_for(duration.as_integral());
|
2021-03-20 02:43:48 +00:00
|
|
|
|
|
|
|
|
|
// Update automatic tape motor control, if enabled; if it's been
|
|
|
|
|
// 3 seconds since software last possibly polled the tape, stop it.
|
|
|
|
|
if(use_automatic_tape_motor_control_ && cycles_since_tape_input_read_ < HalfCycles(clock_rate() * 6)) {
|
|
|
|
|
cycles_since_tape_input_read_ += duration;
|
|
|
|
|
|
|
|
|
|
if(cycles_since_tape_input_read_ >= HalfCycles(clock_rate() * 6)) {
|
|
|
|
|
tape_player_.set_motor_control(false);
|
|
|
|
|
recent_tape_hits_ = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
2021-03-22 23:36:05 +00:00
|
|
|
|
|
|
|
|
|
if constexpr (model == Model::Plus3) {
|
2021-03-27 03:54:08 +00:00
|
|
|
|
fdc_ += Cycles(duration.as_integral());
|
2021-03-22 23:36:05 +00:00
|
|
|
|
}
|
2021-03-23 14:44:43 +00:00
|
|
|
|
|
|
|
|
|
if(typer_) typer_->run_for(duration);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void type_string(const std::string &string) override {
|
|
|
|
|
Utility::TypeRecipient<CharacterMapper>::add_typer(string);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool can_type(char c) const override {
|
|
|
|
|
return Utility::TypeRecipient<CharacterMapper>::can_type(c);
|
2021-03-19 12:49:56 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
public:
|
|
|
|
|
|
2021-03-23 20:38:04 +00:00
|
|
|
|
// MARK: - Typer.
|
2021-03-23 14:44:43 +00:00
|
|
|
|
HalfCycles get_typer_delay(const std::string &) const override {
|
|
|
|
|
return z80_.get_is_resetting() ? Cycles(7'000'000) : Cycles(0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
HalfCycles get_typer_frequency() const override{
|
2021-03-23 20:59:43 +00:00
|
|
|
|
return Cycles(70'908);
|
2021-03-23 14:44:43 +00:00
|
|
|
|
}
|
2021-03-19 03:51:21 +00:00
|
|
|
|
|
|
|
|
|
KeyboardMapper *get_keyboard_mapper() override {
|
|
|
|
|
return &keyboard_mapper_;
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-23 20:38:04 +00:00
|
|
|
|
// MARK: - Keyboard.
|
2021-03-19 03:51:21 +00:00
|
|
|
|
void set_key_state(uint16_t key, bool is_pressed) override {
|
|
|
|
|
keyboard_.set_key_state(key, is_pressed);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void clear_all_keys() override {
|
|
|
|
|
keyboard_.clear_all_keys();
|
2021-03-23 00:12:03 +00:00
|
|
|
|
|
|
|
|
|
// Caveat: if holding enter synthetically, continue to do so.
|
|
|
|
|
if(duration_to_press_enter_ > Cycles(0)) {
|
|
|
|
|
keyboard_.set_key_state(ZX::Keyboard::KeyEnter, true);
|
|
|
|
|
}
|
2021-03-19 03:51:21 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-19 15:12:50 +00:00
|
|
|
|
// MARK: - MediaTarget.
|
|
|
|
|
bool insert_media(const Analyser::Static::Media &media) override {
|
|
|
|
|
// If there are any tapes supplied, use the first of them.
|
|
|
|
|
if(!media.tapes.empty()) {
|
|
|
|
|
tape_player_.set_tape(media.tapes.front());
|
2021-03-27 22:08:46 +00:00
|
|
|
|
set_use_fast_tape();
|
2021-03-19 15:12:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-22 23:36:05 +00:00
|
|
|
|
// Insert up to four disks.
|
|
|
|
|
int c = 0;
|
|
|
|
|
for(auto &disk : media.disks) {
|
|
|
|
|
fdc_->set_disk(disk, c);
|
|
|
|
|
c++;
|
|
|
|
|
if(c == 4) break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return !media.tapes.empty() || (!media.disks.empty() && model == Model::Plus3);
|
2021-03-19 15:12:50 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-23 20:38:04 +00:00
|
|
|
|
// MARK: - ClockingHint::Observer.
|
|
|
|
|
|
|
|
|
|
void set_component_prefers_clocking(ClockingHint::Source *, ClockingHint::Preference) override {
|
|
|
|
|
tape_player_is_sleeping_ = tape_player_.preferred_clocking() == ClockingHint::Preference::None;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// MARK: - Tape control.
|
2021-03-20 02:17:20 +00:00
|
|
|
|
|
|
|
|
|
void set_use_automatic_tape_motor_control(bool enabled) {
|
|
|
|
|
use_automatic_tape_motor_control_ = enabled;
|
|
|
|
|
if(!enabled) {
|
|
|
|
|
tape_player_.set_motor_control(false);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void set_tape_is_playing(bool is_playing) final {
|
|
|
|
|
tape_player_.set_motor_control(is_playing);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool get_tape_is_playing() final {
|
|
|
|
|
return tape_player_.get_motor_control();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// MARK: - Configuration options.
|
|
|
|
|
|
|
|
|
|
std::unique_ptr<Reflection::Struct> get_options() override {
|
|
|
|
|
auto options = std::make_unique<Options>(Configurable::OptionsType::UserFriendly); // OptionsType is arbitrary, but not optional.
|
|
|
|
|
options->automatic_tape_motor_control = use_automatic_tape_motor_control_;
|
|
|
|
|
options->quickload = allow_fast_tape_hack_;
|
|
|
|
|
return options;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void set_options(const std::unique_ptr<Reflection::Struct> &str) override {
|
|
|
|
|
const auto options = dynamic_cast<Options *>(str.get());
|
|
|
|
|
set_video_signal_configurable(options->output);
|
|
|
|
|
set_use_automatic_tape_motor_control(options->automatic_tape_motor_control);
|
|
|
|
|
allow_fast_tape_hack_ = options->quickload;
|
|
|
|
|
set_use_fast_tape();
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-20 03:33:46 +00:00
|
|
|
|
// MARK: - AudioProducer.
|
|
|
|
|
|
|
|
|
|
Outputs::Speaker::Speaker *get_speaker() override {
|
|
|
|
|
return &speaker_;
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-23 20:38:04 +00:00
|
|
|
|
// MARK: - Activity Source.
|
2021-03-23 14:32:22 +00:00
|
|
|
|
void set_activity_observer(Activity::Observer *observer) override {
|
|
|
|
|
if constexpr (model == Model::Plus3) fdc_->set_activity_observer(observer);
|
|
|
|
|
tape_player_.set_activity_observer(observer);
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-18 14:18:17 +00:00
|
|
|
|
private:
|
2021-03-18 14:43:51 +00:00
|
|
|
|
CPU::Z80::Processor<ConcreteMachine, false, false> z80_;
|
|
|
|
|
|
|
|
|
|
// MARK: - Memory.
|
2021-03-18 14:18:17 +00:00
|
|
|
|
std::array<uint8_t, 64*1024> rom_;
|
|
|
|
|
std::array<uint8_t, 128*1024> ram_;
|
2021-03-18 14:43:51 +00:00
|
|
|
|
|
|
|
|
|
std::array<uint8_t, 16*1024> scratch_;
|
|
|
|
|
const uint8_t *read_pointers_[4];
|
|
|
|
|
uint8_t *write_pointers_[4];
|
2021-03-22 13:02:49 +00:00
|
|
|
|
uint8_t pages_[4];
|
2021-03-19 12:49:56 +00:00
|
|
|
|
bool is_contended_[4];
|
2021-03-22 19:46:02 +00:00
|
|
|
|
bool is_video_[4];
|
2021-03-18 14:43:51 +00:00
|
|
|
|
|
|
|
|
|
uint8_t port1ffd_ = 0;
|
|
|
|
|
uint8_t port7ffd_ = 0;
|
|
|
|
|
bool disable_paging_ = false;
|
|
|
|
|
|
|
|
|
|
void update_memory_map() {
|
2021-03-18 16:14:48 +00:00
|
|
|
|
// If paging is permanently disabled, don't react.
|
2021-03-18 14:43:51 +00:00
|
|
|
|
if(disable_paging_) {
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2021-03-22 00:23:00 +00:00
|
|
|
|
if(port1ffd_ & 0x01) {
|
2021-03-18 14:43:51 +00:00
|
|
|
|
// "Special paging mode", i.e. one of four fixed
|
|
|
|
|
// RAM configurations, port 7ffd doesn't matter.
|
|
|
|
|
|
2021-03-22 00:23:00 +00:00
|
|
|
|
switch(port1ffd_ & 0x06) {
|
2021-03-18 14:43:51 +00:00
|
|
|
|
default:
|
|
|
|
|
case 0x00:
|
2021-03-22 13:02:49 +00:00
|
|
|
|
set_memory(0, 0);
|
|
|
|
|
set_memory(1, 1);
|
|
|
|
|
set_memory(2, 2);
|
|
|
|
|
set_memory(3, 3);
|
2021-03-18 14:43:51 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x02:
|
2021-03-22 13:02:49 +00:00
|
|
|
|
set_memory(0, 4);
|
|
|
|
|
set_memory(1, 5);
|
|
|
|
|
set_memory(2, 6);
|
|
|
|
|
set_memory(3, 7);
|
2021-03-18 14:43:51 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x04:
|
2021-03-22 13:02:49 +00:00
|
|
|
|
set_memory(0, 4);
|
|
|
|
|
set_memory(1, 5);
|
|
|
|
|
set_memory(2, 6);
|
|
|
|
|
set_memory(3, 3);
|
2021-03-18 14:43:51 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x06:
|
2021-03-22 13:02:49 +00:00
|
|
|
|
set_memory(0, 4);
|
|
|
|
|
set_memory(1, 7);
|
|
|
|
|
set_memory(2, 6);
|
|
|
|
|
set_memory(3, 3);
|
2021-03-18 14:43:51 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
2021-03-22 13:02:49 +00:00
|
|
|
|
} else {
|
|
|
|
|
// Apply standard 128kb-esque mapping (albeit with extra ROM to pick from).
|
|
|
|
|
set_memory(0, 0x80 | ((port1ffd_ >> 1) & 2) | ((port7ffd_ >> 4) & 1));
|
|
|
|
|
set_memory(1, 5);
|
|
|
|
|
set_memory(2, 2);
|
|
|
|
|
set_memory(3, port7ffd_ & 7);
|
2021-03-18 14:43:51 +00:00
|
|
|
|
}
|
2021-03-22 13:02:49 +00:00
|
|
|
|
}
|
2021-03-18 14:43:51 +00:00
|
|
|
|
|
2021-03-22 13:02:49 +00:00
|
|
|
|
void set_memory(int bank, uint8_t source) {
|
2021-04-15 22:57:34 +00:00
|
|
|
|
if constexpr (model >= Model::Plus2a) {
|
|
|
|
|
is_contended_[bank] = (source >= 4 && source < 8);
|
|
|
|
|
} else {
|
|
|
|
|
is_contended_[bank] = source & 1;
|
|
|
|
|
}
|
2021-03-22 13:02:49 +00:00
|
|
|
|
pages_[bank] = source;
|
2021-03-18 14:43:51 +00:00
|
|
|
|
|
2021-04-15 01:37:10 +00:00
|
|
|
|
uint8_t *const read = (source < 0x80) ? &ram_[source * 16384] : &rom_[(source & 0x7f) * 16384];
|
2021-03-22 13:02:49 +00:00
|
|
|
|
const auto offset = bank*16384;
|
2021-03-18 14:43:51 +00:00
|
|
|
|
|
2021-03-22 13:02:49 +00:00
|
|
|
|
read_pointers_[bank] = read - offset;
|
|
|
|
|
write_pointers_[bank] = ((source < 0x80) ? read : scratch_.data()) - offset;
|
2021-03-18 14:43:51 +00:00
|
|
|
|
}
|
2021-03-18 16:14:48 +00:00
|
|
|
|
|
2021-03-22 00:23:00 +00:00
|
|
|
|
void set_video_address() {
|
|
|
|
|
video_->set_video_source(&ram_[((port7ffd_ & 0x08) ? 7 : 5) * 16384]);
|
2021-03-22 13:02:49 +00:00
|
|
|
|
update_video_base();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void update_video_base() {
|
|
|
|
|
const uint8_t video_page = (port7ffd_ & 0x08) ? 7 : 5;
|
2021-03-22 19:46:02 +00:00
|
|
|
|
is_video_[0] = pages_[0] == video_page;
|
|
|
|
|
is_video_[1] = pages_[1] == video_page;
|
|
|
|
|
is_video_[2] = pages_[2] == video_page;
|
|
|
|
|
is_video_[3] = pages_[3] == video_page;
|
2021-03-22 00:23:00 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-03-18 16:14:48 +00:00
|
|
|
|
// MARK: - Audio.
|
|
|
|
|
Concurrency::DeferringAsyncTaskQueue audio_queue_;
|
|
|
|
|
GI::AY38910::AY38910<false> ay_;
|
|
|
|
|
Audio::Toggle audio_toggle_;
|
|
|
|
|
Outputs::Speaker::CompoundSource<GI::AY38910::AY38910<false>, Audio::Toggle> mixer_;
|
|
|
|
|
Outputs::Speaker::LowpassSpeaker<Outputs::Speaker::CompoundSource<GI::AY38910::AY38910<false>, Audio::Toggle>> speaker_;
|
2021-03-18 16:23:54 +00:00
|
|
|
|
|
|
|
|
|
HalfCycles time_since_audio_update_;
|
|
|
|
|
void update_audio() {
|
|
|
|
|
speaker_.run_for(audio_queue_, time_since_audio_update_.divide_cycles(Cycles(2)));
|
|
|
|
|
}
|
2021-03-18 16:47:48 +00:00
|
|
|
|
|
|
|
|
|
// MARK: - Video.
|
2021-04-15 02:23:27 +00:00
|
|
|
|
using VideoType =
|
|
|
|
|
std::conditional_t<
|
|
|
|
|
model <= Model::FortyEightK, Video<VideoTiming::FortyEightK>,
|
|
|
|
|
std::conditional_t<
|
|
|
|
|
model <= Model::Plus2, Video<VideoTiming::OneTwoEightK>,
|
|
|
|
|
Video<VideoTiming::Plus3>
|
|
|
|
|
>
|
|
|
|
|
>;
|
|
|
|
|
JustInTimeActor<VideoType> video_;
|
2021-03-19 03:51:21 +00:00
|
|
|
|
|
|
|
|
|
// MARK: - Keyboard.
|
2021-03-19 14:36:08 +00:00
|
|
|
|
Sinclair::ZX::Keyboard::Keyboard keyboard_;
|
|
|
|
|
Sinclair::ZX::Keyboard::KeyboardMapper keyboard_mapper_;
|
2021-03-19 15:12:50 +00:00
|
|
|
|
|
2021-03-22 23:36:05 +00:00
|
|
|
|
// MARK: - Tape.
|
2021-03-19 15:12:50 +00:00
|
|
|
|
Storage::Tape::BinaryTapePlayer tape_player_;
|
2021-03-23 20:38:04 +00:00
|
|
|
|
bool tape_player_is_sleeping_ = false;
|
2021-03-20 02:17:20 +00:00
|
|
|
|
|
2021-03-20 02:43:48 +00:00
|
|
|
|
bool use_automatic_tape_motor_control_ = true;
|
2021-03-20 02:17:20 +00:00
|
|
|
|
HalfCycles cycles_since_tape_input_read_;
|
2021-03-20 02:43:48 +00:00
|
|
|
|
int recent_tape_hits_ = 0;
|
2021-03-20 02:17:20 +00:00
|
|
|
|
|
|
|
|
|
bool allow_fast_tape_hack_ = false;
|
2021-03-22 23:04:38 +00:00
|
|
|
|
bool use_fast_tape_hack_ = false;
|
2021-03-20 02:17:20 +00:00
|
|
|
|
void set_use_fast_tape() {
|
2021-03-22 23:04:38 +00:00
|
|
|
|
use_fast_tape_hack_ = allow_fast_tape_hack_ && tape_player_.has_tape();
|
|
|
|
|
}
|
|
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// Reimplements the 'LD-BYTES' routine, as documented at
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2021-04-05 02:39:30 +00:00
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// https://skoolkid.github.io/rom/asm/0556.html but picking
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// up from address 56b i.e.
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2021-03-22 23:04:38 +00:00
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//
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// In:
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2021-04-05 02:39:30 +00:00
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// A': 0x00 or 0xff for block type;
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// F': carry set if loading, clear if verifying;
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2021-03-22 23:04:38 +00:00
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// DE: block length;
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// IX: start address.
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//
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// Out:
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// F: carry set for success, clear for error.
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2021-04-05 02:39:30 +00:00
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//
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// And, empirically:
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// IX: one beyond final address written;
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// DE: 0;
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// L: parity byte;
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// H: 0 for no error, 0xff for error;
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// A: same as H.
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// BC: ???
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bool perform_rom_ld_bytes_56b() {
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2021-03-22 23:04:38 +00:00
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using Parser = Storage::Tape::ZXSpectrum::Parser;
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Parser parser(Parser::MachineType::ZXSpectrum);
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using Register = CPU::Z80::Register;
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2021-04-05 02:39:30 +00:00
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uint8_t flags = uint8_t(z80_.get_value_of_register(Register::FlagsDash));
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2021-03-22 23:04:38 +00:00
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if(!(flags & 1)) return false;
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2021-04-05 02:39:30 +00:00
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const uint8_t block_type = uint8_t(z80_.get_value_of_register(Register::ADash));
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2021-03-22 23:04:38 +00:00
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const auto block = parser.find_block(tape_player_.get_tape());
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if(!block || block_type != (*block).type) return false;
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uint16_t length = z80_.get_value_of_register(Register::DE);
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uint16_t target = z80_.get_value_of_register(Register::IX);
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2021-04-05 02:39:30 +00:00
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flags = 0x93;
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uint8_t parity = 0x00;
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2021-03-22 23:04:38 +00:00
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while(length--) {
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auto next = parser.get_byte(tape_player_.get_tape());
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if(!next) {
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flags &= ~1;
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break;
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}
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write_pointers_[target >> 14][target] = *next;
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2021-04-05 02:39:30 +00:00
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parity ^= *next;
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2021-03-22 23:04:38 +00:00
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++target;
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}
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2021-04-05 02:39:30 +00:00
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auto stored_parity = parser.get_byte(tape_player_.get_tape());
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if(!stored_parity) {
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flags &= ~1;
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} else {
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z80_.set_value_of_register(Register::L, *stored_parity);
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}
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2021-03-22 23:04:38 +00:00
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z80_.set_value_of_register(Register::Flags, flags);
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2021-04-05 02:39:30 +00:00
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z80_.set_value_of_register(Register::DE, length);
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z80_.set_value_of_register(Register::IX, target);
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const uint8_t h = (flags & 1) ? 0x00 : 0xff;
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z80_.set_value_of_register(Register::H, h);
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z80_.set_value_of_register(Register::A, h);
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2021-03-22 23:04:38 +00:00
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return true;
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2021-03-20 02:17:20 +00:00
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}
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2021-03-22 23:36:05 +00:00
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2021-04-15 21:31:42 +00:00
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static constexpr int classic_rom_offset() {
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switch(model) {
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case Model::SixteenK:
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case Model::FortyEightK:
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return 0x0000;
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case Model::OneTwoEightK:
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case Model::Plus2:
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return 0x4000;
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case Model::Plus2a:
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case Model::Plus3:
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return 0xc000;
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}
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}
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2021-03-22 23:36:05 +00:00
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// MARK: - Disc.
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2021-04-04 21:33:49 +00:00
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JustInTimeActor<Amstrad::FDC, Cycles> fdc_;
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2021-03-23 00:12:03 +00:00
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// MARK: - Automatic startup.
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Cycles duration_to_press_enter_;
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2021-03-18 14:18:17 +00:00
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};
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}
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}
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2021-03-18 03:38:55 +00:00
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using namespace Sinclair::ZXSpectrum;
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Machine *Machine::ZXSpectrum(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher) {
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2021-03-18 14:18:17 +00:00
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const auto zx_target = dynamic_cast<const Analyser::Static::ZXSpectrum::Target *>(target);
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switch(zx_target->model) {
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2021-04-15 01:37:10 +00:00
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case Model::SixteenK: return new ConcreteMachine<Model::SixteenK>(*zx_target, rom_fetcher);
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case Model::FortyEightK: return new ConcreteMachine<Model::FortyEightK>(*zx_target, rom_fetcher);
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case Model::OneTwoEightK: return new ConcreteMachine<Model::OneTwoEightK>(*zx_target, rom_fetcher);
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case Model::Plus2: return new ConcreteMachine<Model::Plus2>(*zx_target, rom_fetcher);
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case Model::Plus2a: return new ConcreteMachine<Model::Plus2a>(*zx_target, rom_fetcher);
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case Model::Plus3: return new ConcreteMachine<Model::Plus3>(*zx_target, rom_fetcher);
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2021-03-18 14:18:17 +00:00
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}
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2021-03-18 03:38:55 +00:00
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return nullptr;
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}
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Machine::~Machine() {}
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