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Merge pull request #1149 from TomHarte/65816StackAgain

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Add a between-instructions enforcement of SH = 1.
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Thomas Harte 2023-08-05 15:14:53 -04:00 committed by GitHub
commit 0222dcf5ce
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2 changed files with 4 additions and 2 deletions
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3
Processors/65816/Implementation/65816Implementation.hpp
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@ -67,6 +67,9 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
last_operation_pc_ = registers_.pc;
last_operation_program_bank_ = uint8_t(registers_.program_bank >> 16);
memory_lock_ = false;
// Reenforce the top byte of S if applicable.
registers_.s.halves.high = stack_address();
} continue;
case OperationDecode: {

3
Processors/65816/Implementation/65816Storage.cpp
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@ -1131,11 +1131,10 @@ void ProcessorStorage::set_emulation_mode(bool enabled) {
set_m_x_flags(true, true);
registers_.e_masks[0] = 0xff00;
registers_.e_masks[1] = 0x00ff;
registers_.s.halves.high = 1;
} else {
registers_.e_masks[0] = 0x0000;
registers_.e_masks[1] = 0xffff;
registers_.s.halves.high = 1; // To pretend it was 1 all along; this implementation actually ignores
// the top byte while in emulation mode.
}
}