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https://github.com/TomHarte/CLK.git
synced 2026-03-11 04:42:20 +00:00
Introduce a colour burst.
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@@ -163,18 +163,14 @@ public:
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void perform_bus_cycle(const Motorola::CRTC::BusState &state) {
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system_via_.set_control_line_input<MOS::MOS6522::Port::A, MOS::MOS6522::Line::One>(state.vsync);
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// // The gate array waits 2us to react to the CRTC's vsync signal, and then
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// // caps output at 4us. Since the clock rate is 1Mhz, that's 2 and 4 cycles,
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// // respectively.
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// if(state.hsync) {
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// cycles_into_hsync_++;
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// } else {
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// cycles_into_hsync_ = 0;
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// }
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//
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// const bool is_hsync = (cycles_into_hsync_ >= 2 && cycles_into_hsync_ < 6);
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// const bool is_colour_burst = (cycles_into_hsync_ >= 7 && cycles_into_hsync_ < 11);
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//
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// Count cycles since horizontal sync to insert a colour burst.
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if(state.hsync) {
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++cycles_into_hsync_;
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} else {
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cycles_into_hsync_ = 0;
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}
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const bool is_colour_burst = (cycles_into_hsync_ >= 5 && cycles_into_hsync_ < 9);
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// Sync is taken to override pixels, and is combined as a simple OR.
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const bool is_sync = state.hsync || state.vsync;
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const bool is_blank = !is_sync && state.hsync;
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@@ -182,8 +178,8 @@ public:
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OutputMode output_mode;
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if(is_sync) {
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output_mode = OutputMode::Sync;
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// } else if(is_colour_burst) {
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// output_mode = OutputMode::ColourBurst;
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} else if(is_colour_burst) {
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output_mode = OutputMode::ColourBurst;
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} else if(is_blank) {
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output_mode = OutputMode::Blank;
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} else if(state.display_enable) {
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@@ -275,31 +271,6 @@ public:
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// }
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// }
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// }
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//
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// // Latch mode four cycles after HSYNC was signalled, if still active.
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// if(cycles_into_hsync_ == 4 && mode_ != next_mode_) {
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// mode_ = next_mode_;
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// switch(mode_) {
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// default:
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// case 0: pixel_divider_ = 4; break;
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// case 1: pixel_divider_ = 2; break;
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// case 2: pixel_divider_ = 1; break;
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// }
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// build_mode_table();
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// }
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//
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// // For the interrupt timer: notify the leading edge of vertical sync and the
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// // trailing edge of horizontal sync.
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// if(was_vsync_ != state.vsync) {
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// interrupt_timer_.set_vsync(state.vsync);
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// }
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// if(was_hsync_ && !state.hsync) {
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// interrupt_timer_.signal_hsync();
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// }
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//
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// // Update current state for edge detection next time around.
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// was_vsync_ = state.vsync;
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// was_hsync_ = state.hsync;
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}
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/// Sets the destination for output.
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@@ -332,8 +303,6 @@ private:
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Pixels
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} previous_output_mode_ = OutputMode::Sync;
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int cycles_ = 0;
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bool was_hsync_ = false, was_vsync_ = false;
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int cycles_into_hsync_ = 0;
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Outputs::CRT::CRT crt_;
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