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Add TRAP, TRAPV.
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@ -17,13 +17,7 @@
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namespace CPU {
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namespace CPU {
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namespace MC68000Mk2 {
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namespace MC68000Mk2 {
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// TODO: BERR, interrupt inputs, etc; and obeying the trace flag.
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// TODO: obeyance of the trace flag, the address/bus error exception.
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// Also, from Instruction.hpp:
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//
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// TRAP, TRAPV
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//
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// Not provided by a 68000: Bccl, BSRl
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/// States for the state machine which are named by
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/// States for the state machine which are named by
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/// me for their purpose rather than automatically by file position.
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/// me for their purpose rather than automatically by file position.
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@ -183,6 +177,8 @@ enum ExecutionState: int {
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RESET,
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RESET,
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NOP,
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NOP,
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STOP,
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STOP,
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TRAP,
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TRAPV,
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};
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};
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// MARK: - The state machine.
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// MARK: - The state machine.
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@ -880,6 +876,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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SpecialCASE(STOP);
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SpecialCASE(STOP);
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SpecialCASE(TRAP);
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SpecialCASE(TRAPV);
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default:
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default:
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assert(false);
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assert(false);
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}
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}
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@ -2274,6 +2273,25 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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Prefetch();
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Prefetch();
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MoveToStateSpecific(Decode);
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MoveToStateSpecific(Decode);
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//
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// TRAP, TRAPV
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//
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// TODO: which program counter is appropriate for TRAP? That of the TRAP,
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// or that of the instruction after?
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BeginState(TRAP):
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IdleBus(2);
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exception_vector_ = (opcode_ & 15) + InstructionSet::M68k::Exception::TrapBase;
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MoveToStateSpecific(StandardException);
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BeginState(TRAPV):
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Prefetch();
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if(!status_.overflow_flag) {
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MoveToStateSpecific(Decode);
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}
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exception_vector_ = InstructionSet::M68k::Exception::TRAPV;
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MoveToStateSpecific(StandardException);
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//
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//
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// Various states TODO.
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// Various states TODO.
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//
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//
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@ -150,7 +150,6 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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template <typename IntT> void complete_bcc(bool, IntT);
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template <typename IntT> void complete_bcc(bool, IntT);
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inline void complete_dbcc(bool, bool, int16_t);
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inline void complete_dbcc(bool, bool, int16_t);
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inline void bsr(uint32_t);
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inline void bsr(uint32_t);
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inline void stop() {} // TODO
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inline void move_to_usp(uint32_t);
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inline void move_to_usp(uint32_t);
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inline void move_from_usp(uint32_t &);
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inline void move_from_usp(uint32_t &);
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inline void tas(Preinstruction, uint32_t);
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inline void tas(Preinstruction, uint32_t);
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@ -170,6 +169,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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inline void rte() {}
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inline void rte() {}
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inline void rts() {}
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inline void rts() {}
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inline void reset() {}
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inline void reset() {}
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inline void stop() {}
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// Some microcycles that will be modified as required and used in the main loop;
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// Some microcycles that will be modified as required and used in the main loop;
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// the semantics of a switch statement make in-place declarations awkward and
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// the semantics of a switch statement make in-place declarations awkward and
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