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Merge branch '68000Mk2' into InMacintosh
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commit
c367ddff1b
@ -45,7 +45,7 @@ template <Model model, Operation t_operation> constexpr uint8_t operand_flags(Op
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//
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// Single-operand write.
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//
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case Operation::MOVEfromSR: case Operation::MOVEfromUSP:
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case Operation::MOVEfromUSP:
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return StoreOp1;
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//
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@ -66,8 +66,9 @@ template <Model model, Operation t_operation> constexpr uint8_t operand_flags(Op
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return FetchOp1 | StoreOp1;
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//
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// CLR, which is model-dependent.
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// CLR and MOVE SR, which are model-dependent.
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//
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case Operation::MOVEfromSR:
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case Operation::CLRb: case Operation::CLRw: case Operation::CLRl:
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if constexpr (model == Model::M68000) {
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return FetchOp1 | StoreOp1;
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@ -86,16 +86,16 @@ enum ExecutionState: int {
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FetchAbsoluteLong_l,
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FetchImmediateData_l,
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CalcEffectiveAddress,
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CalcAddressRegisterIndirect,
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CalcAddressRegisterIndirectWithPostincrement,
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CalcAddressRegisterIndirectWithPredecrement,
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CalcAddressRegisterIndirectWithDisplacement,
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CalcAddressRegisterIndirectWithIndex8bitDisplacement,
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CalcProgramCounterIndirectWithDisplacement,
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CalcProgramCounterIndirectWithIndex8bitDisplacement,
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CalcAbsoluteShort,
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CalcAbsoluteLong,
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CalcEffectiveAddress, // -
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CalcAddressRegisterIndirect, // -
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CalcAddressRegisterIndirectWithPostincrement, // -
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CalcAddressRegisterIndirectWithPredecrement, // -
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CalcAddressRegisterIndirectWithDisplacement, // np
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CalcAddressRegisterIndirectWithIndex8bitDisplacement, // n np n
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CalcProgramCounterIndirectWithDisplacement, // np
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CalcProgramCounterIndirectWithIndex8bitDisplacement, // n np n
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CalcAbsoluteShort, // np
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CalcAbsoluteLong, // np np
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// Various forms of perform; each of these will
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// perform the current instruction, then do the
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@ -943,14 +943,12 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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Duplicate(MOVEtoCCR, MOVEtoSR);
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StdCASE(MOVEtoSR, perform_state_ = MOVEtoCCRSR);
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StdCASE(MOVEfromSR, {
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if(instruction_.mode(0) == Mode::DataRegisterDirect) {
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post_ea_state_ = Perform_np_n;
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perform_state_ = Perform_np_n;
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} else {
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post_ea_state_ = Perform_np;
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perform_state_ = Perform_np;
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}
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MoveToStateSpecific(CalcEffectiveAddress);
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});
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SpecialCASE(RTR);
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@ -1324,6 +1322,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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BeginState(CalcAddressRegisterIndirectWithIndex8bitDisplacement):
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effective_address_[next_operand_].l = d8Xn(registers_[8 + instruction_.reg(next_operand_)].l);
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IdleBus(1); // n
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Prefetch(); // np
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IdleBus(1); // n
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MoveToStateDynamic(post_ea_state_);
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@ -1359,6 +1358,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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BeginState(CalcProgramCounterIndirectWithIndex8bitDisplacement):
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effective_address_[next_operand_].l = d8Xn(program_counter_.l - 2);
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IdleBus(1); // n
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Prefetch(); // np
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IdleBus(1); // n
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MoveToStateDynamic(post_ea_state_);
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