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Author	SHA1	Message	Date
Thomas Harte	a245f729ab	Pull lines_per_row decision out of the loop.	2025-11-11 21:45:52 -05:00
Thomas Harte	b622cc9536	Merge pull request #1635 from TomHarte/CleanerQueue ... Enforce perform_automatically, start_immediately; relax Boolean access order.	2025-11-10 14:09:31 -05:00
Thomas Harte	a81309433c	Switch to lambda form.	2025-11-09 21:09:57 -05:00
Thomas Harte	902f388cb1	Enforce perform_automatically, start_immediately; relax Boolean access order.	2025-11-09 00:17:39 -05:00
Thomas Harte	c5704aaaff	Merge pull request #1633 from TomHarte/TubeBrevity ... Move point of templature to tube processors.	2025-11-07 18:05:19 -05:00
Thomas Harte	e115f09f51	Merge pull request #1632 from TomHarte/6845DeadState ... Remove dead state.	2025-11-07 17:54:13 -05:00
Thomas Harte	32cd142629	Move point of templature to tube processors.	2025-11-07 17:27:52 -05:00
Thomas Harte	b00be303aa	Remove dead state.	2025-11-07 13:08:12 -05:00
Thomas Harte	273e23bd98	Merge pull request #1631 from TomHarte/SecondProcessorScreenshot ... Substitute a screenshot of Second Processor Elite.	2025-11-07 12:54:16 -05:00
Thomas Harte	5063e6943d	Substitute a screenshot of Second Processor Elite.	2025-11-07 12:53:09 -05:00
Thomas Harte	ce32747973	Record new version number. 2025-11-07	2025-11-07 12:39:46 -05:00
Thomas Harte	a8ef8dfb21	Merge pull request #1630 from TomHarte/DNFS ... Add DFS 0.9 to ROM catalogue; restrict CRTC pointer size.	2025-11-07 11:19:21 -05:00
Thomas Harte	7658edca62	Remove unused enum.	2025-11-07 10:49:26 -05:00
Thomas Harte	056028e07b	Put bit restriction on register pointer.	2025-11-07 10:43:14 -05:00
Thomas Harte	34992126a8	Allow installation of smaller ROMs.	2025-11-07 09:12:47 -05:00
Thomas Harte	d30d4e8f89	Add DFS 0.9 to the ROM catalogue.	2025-11-07 09:08:16 -05:00
Thomas Harte	f562deca48	Record new version number. 2025-11-05	2025-11-05 20:56:13 -05:00
Thomas Harte	b2b7aa221b	Merge pull request #1629 from TomHarte/6502SecondAnalyser ... Automatically add a 65c02 second processor if seemingly helpful.	2025-11-05 20:51:44 -05:00
Thomas Harte	b98a9a8487	Add automatic test for 6502 second processor.	2025-11-05 20:40:29 -05:00
Thomas Harte	7f36a8a746	Merge pull request #1628 from TomHarte/TubeResetLater ... Give Tube ULA full ownership of parasite IRQ/NMI/reset.	2025-11-05 15:41:50 -05:00
Thomas Harte	2fe6e9c7fc	Reformulate to give ULA full IRQ/NMI/reset signalling duties.	2025-11-05 15:27:11 -05:00
Thomas Harte	62919e77d4	Reset at end.	2025-11-05 15:11:49 -05:00
Thomas Harte	871b724290	Merge pull request #1627 from TomHarte/TubeReset ... Propagate system reset to the tube.	2025-11-04 23:24:20 -05:00
Thomas Harte	ca23c04ba1	Propagate system reset to the tube.	2025-11-04 23:18:18 -05:00
Thomas Harte	44b8f75611	Merge pull request #1626 from TomHarte/TubeSelection ... Detect CP/M discs and route to the Z80 second processor.	2025-11-04 23:11:31 -05:00
Thomas Harte	301df785fe	Fix weird Os for 0s substitution.	2025-11-04 23:11:06 -05:00
Thomas Harte	9657109471	Correct comment.	2025-11-04 23:10:14 -05:00
Thomas Harte	139569e291	Detect CP/M discs and route to the Z80 second processor.	2025-11-04 22:46:15 -05:00
Thomas Harte	1383c1dad4	Merge pull request #1625 from TomHarte/TubeZ80 ... Add Z80 second processor.	2025-11-04 22:35:26 -05:00
Thomas Harte	1d2cdd85a3	Explain size limit.	2025-11-04 22:27:05 -05:00
Thomas Harte	76082b1271	Allow DSD discs to be twice as large.	2025-11-04 22:20:06 -05:00
Thomas Harte	25dcbf918d	Ensure Z80 interrupts end.	2025-11-04 22:04:41 -05:00
Thomas Harte	6c72c1842b	Change interrupt vector.	2025-11-04 21:57:20 -05:00
Thomas Harte	4e4388dc35	Adjust reset logic, 6502 tube paging.	2025-11-04 21:34:45 -05:00
Thomas Harte	54bff80ecc	Fix: it's the PC going above 0x8000 that ends ROM visibility.	2025-11-04 18:21:00 -05:00
Thomas Harte	78073aaa11	Add Z80 tube ROM.	2025-11-04 17:45:27 -05:00
Thomas Harte	4df01a7e0d	Ensure Z80 processes.	2025-11-04 17:38:46 -05:00
Thomas Harte	f4d15d0640	Mostly wire in a Z80 second processor.	2025-11-04 17:36:30 -05:00
Thomas Harte	64842d4de2	Merge pull request #1621 from TomHarte/Tube ... Introduce experimental 6502 tube processor support.	2025-11-04 13:53:35 -05:00
Thomas Harte	f52315ac92	Further annotate.	2025-11-04 12:48:49 -05:00
Thomas Harte	cc88877109	Move tube holder out of line.	2025-11-04 12:46:15 -05:00
Thomas Harte	d7568e57c3	Make other layout edits.	2025-11-04 09:27:04 -05:00
Thomas Harte	d49b301fca	Improve commentary.	2025-11-04 09:22:17 -05:00
Thomas Harte	0113bcbea7	Include tube storage only when needed.	2025-11-04 09:20:28 -05:00
Thomas Harte	0332bb4f12	Merge pull request #1624 from TomHarte/ArchimedesVideoTiming ... Pull clock divider inside the loop.	2025-11-03 21:32:11 -05:00
Thomas Harte	82a5d5116a	Expose processor option to macOS users, too.	2025-11-03 21:31:44 -05:00
Thomas Harte	62a6797ef3	The second processor appears to be a 65c02.	2025-11-03 21:06:34 -05:00
Thomas Harte	bb66033682	Fix interrupting inward FIFO.	2025-11-03 21:02:14 -05:00
Thomas Harte	d4aa0799a9	Take a swing at reset.	2025-11-03 20:50:47 -05:00
Thomas Harte	fba2d37714	Correct flags, out-of-bounds writes.	2025-11-03 20:32:08 -05:00