Commit Graph
269 Commits
Author SHA1 Message Date
Thomas Harte 6fef00447d Formalise empty-string semantics. 2026-05-09 23:20:26 -04:00
Thomas Harte 5eb2cf108e Prefer reference: this shouldn't be nullable. 2026-05-02 10:59:31 -04:00
Thomas Harte 85ddc42f9c Regularise factory method name. 2026-05-01 22:41:25 -04:00
Thomas Harte d8d8d00985 Attempt high-level version of Loriciels loader. 2026-04-27 10:06:30 -04:00
Thomas Harte f7cf9273af Dash back to a functioning build. 2026-04-14 21:36:37 -04:00
Thomas Harte 4ec043a4c7 Wire though unicode character lookup. 2026-04-14 18:17:29 -04:00
Thomas Harte 4ee674287e Neaten. 2026-03-09 12:30:53 -04:00
Thomas Harte 892f16be7b Tilt back towards fused divide-and-convert. 2026-03-09 11:52:51 -04:00
Thomas Harte c41a70a690 Correct result of divide. 2026-03-09 10:53:53 -04:00
Thomas Harte 2d1c865366 Attempt fully generic formulation of divide/flush. 2026-03-07 16:22:16 -05:00
Thomas Harte 186b911e8e Switch to get/as. 2026-03-06 15:44:22 -05:00
Thomas Harte fc7c3db852 Add further asserts. 2025-12-23 21:45:48 -05:00
Thomas Harte ff53b58094 Use single-location address calculations; add asserts. 2025-12-22 22:15:07 -05:00
Thomas Harte 4a28858fa1 Better ensure memory safety. 2025-12-22 17:22:11 -05:00
Thomas Harte 6ac6157d06 Eliminate memset from C++ files. 2025-12-06 10:55:32 -06:00
Thomas Harte c9c1bde6e2 Switch to spinning on SID thread synchronisation. 2025-11-13 17:59:24 -05:00
Thomas Harte e75c27cb66 Add macOS UI to dynamic cropping option, apply at runtime to CPC. 2025-10-29 21:21:21 -04:00
Thomas Harte e19bd0d517 Alphabetise; mark override. 2025-10-29 17:43:05 -04:00
Thomas Harte ecc623cd6c Improve option naming, add one for dynamic crop. 2025-10-29 17:19:15 -04:00
Thomas Harte 89678f1ea7 Tweak decision process, add maximum scale parameter. 2025-10-16 16:26:16 -04:00
Thomas Harte 66d76dc36a Adjust dynamic semantics again. 2025-10-15 23:30:25 -04:00
Thomas Harte 06629def62 Restore some fixed areas, work on API. 2025-10-14 22:51:36 -04:00
Thomas Harte bc6cffa95c Enable full dynamic selection again for the CPC. 2025-10-13 08:54:33 -04:00
Thomas Harte 48ed2912b0 Reenable dynamic framing. 2025-10-12 22:30:37 -04:00
Thomas Harte d3ee778265 Eliminate common black border -> blank mapping.
Will move this inside the CRT.
2025-10-07 22:10:14 -04:00
Thomas Harte 22554a9ba4 Incorporate a one-column delay into CPC output. 2025-10-02 15:22:01 -04:00
Thomas Harte a199b64aa0 Clarify naming, attempt better to conform to FPGA precedent. 2025-09-23 14:27:21 -04:00
Thomas Harte ed4f299d55 Start formalising types. 2025-09-22 13:09:30 -04:00
Thomas Harte 0d1fe03369 Further prefer static constexpr. 2025-09-12 21:40:08 -04:00
Thomas Harte 8eb246cdec Improve consts, line lengths. 2025-04-23 11:01:23 -04:00
Thomas Harte caacf8e373 Eliminate macros. 2025-04-23 10:51:49 -04:00
Thomas Harte 0823fc32fe Eliminate file-relative paths. 2025-02-28 12:30:25 -05:00
Thomas Harte bde2047184 Provide target platform where serialiser will accept it. 2025-01-17 17:09:47 -05:00
Thomas Harte 58d3fdc1c2 Separate stateful serialisation from tapes. 2025-01-17 16:39:21 -05:00
Thomas Harte b89ecadc3a Improve interface. 2024-12-03 22:54:29 -05:00
Thomas Harte d3ed485e7a Take another big swing at indentation, some consts. 2024-12-01 21:44:14 -05:00
Thomas Harte 7248470950 Roll formatting and const tweaks into Inputs. 2024-11-30 18:57:56 -05:00
Thomas Harte 72d7917415 Specify correct 6845; experiment with vsync. 2024-10-16 21:02:58 -04:00
Thomas Harte 26d7d58a5f Add TODO. 2024-10-15 21:16:07 -04:00
Thomas Harte b6fff521e4 Allow new interrupts to override the end of previous. 2024-10-15 12:27:30 -04:00
Thomas Harte 23f1308231 Experiment with reads/writes earlier in the transaction. 2024-10-15 12:10:36 -04:00
Thomas Harte 947e890c59 Adjust mode latch time, timer hsync signalling. 2024-10-15 11:53:00 -04:00
Thomas Harte 9acc80260f Eliminate phases due to lack of evidence. 2024-10-09 11:59:27 -04:00
Thomas Harte 65c1d99120 Add, disable some logging. 2024-10-05 22:30:53 -04:00
Thomas Harte 45549b5fcd Switch CRTC type. 2024-10-03 22:07:12 -04:00
Thomas Harte 581454db69 Tweak mode latch time too. 2024-09-12 20:47:27 -04:00
Thomas Harte 63d501b629 Pull interrupt to start of hsync. 2024-09-12 20:45:28 -04:00
Thomas Harte 1c2f66e855 Fix order of if tests. 2024-09-08 21:23:58 -04:00
Thomas Harte 30b1b36e63 Test digits individually; CSLs autolink. 2024-08-07 22:44:48 -04:00
Thomas Harte 00b3007b9f Switch byte order. 2024-07-02 21:51:00 -04:00