Thomas Harte
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0ef2806970
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Adds just enough to ensure that border state gets through.
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2021-04-25 14:16:35 -04:00 |
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Thomas Harte
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fd271d920b
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Adds capture and forwarding of border colour.
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2021-04-25 14:00:12 -04:00 |
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Thomas Harte
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2bbf8bc9fa
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Ensures 16/48kb snapshots are properly copied into place.
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2021-04-25 13:27:11 -04:00 |
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Thomas Harte
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a5098a60ec
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Attempts to get in-SNA software to start.
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2021-04-25 13:18:26 -04:00 |
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Thomas Harte
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0ebd900e40
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Baby steps: apply Z80 state.
As far as it currently is. Since SNA is leaving the PC at the default of 0x0000, this currently has no visible effect.
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2021-04-25 13:03:24 -04:00 |
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Thomas Harte
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cc78bfb229
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Forwards most of the Z80 state.
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2021-04-25 13:00:43 -04:00 |
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Thomas Harte
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9cc747b3e2
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Resolves potential source of errors: specifying incorrect table size.
(Having made exactly this mistake with the ZX Spectrum)
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2021-04-24 12:10:28 -04:00 |
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Thomas Harte
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37dcf61130
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Add timing tests, fix +3 discrepancy.
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2021-04-23 22:29:57 -04:00 |
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Thomas Harte
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9731fdd33b
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Moves horizontal sync on the 48kb.
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2021-04-21 19:46:44 -04:00 |
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Thomas Harte
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d0c789ff9a
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Locks declarative form of contention closer to regular expressions.
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2021-04-21 19:37:36 -04:00 |
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Thomas Harte
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9baa861742
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Simplifies timing calculation expression.
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2021-04-21 19:18:07 -04:00 |
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Thomas Harte
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9293bcbc88
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Exclude the ROM from contention on 48kb and 128kb models.
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2021-04-21 18:49:18 -04:00 |
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Thomas Harte
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7bac18bd65
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Address bus load time is not + 1/2.
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2021-04-18 18:41:24 -04:00 |
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Thomas Harte
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704737144a
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Corrects all interrupt timing for sign and off-by-one errors.
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2021-04-18 18:40:44 -04:00 |
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Thomas Harte
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e87e851401
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Add a redundant but idiomatic initial value.
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2021-04-18 11:56:22 -04:00 |
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Thomas Harte
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80d4846a27
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Respond with 0xff during an interrupt acknowledge.
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2021-04-18 11:56:00 -04:00 |
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Thomas Harte
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93422f4b1c
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Brings timings into line with WoS specs.
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2021-04-16 22:40:51 -04:00 |
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Thomas Harte
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7fdb1d848b
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Corrects Spectrum 128kb partial decoding.
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2021-04-16 21:54:52 -04:00 |
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Thomas Harte
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d7954a4cb1
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Tweaks timing a little.
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2021-04-15 21:51:49 -04:00 |
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Thomas Harte
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ef636da866
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Attempts 48/128kb floating bus behaviour.
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2021-04-15 21:19:21 -04:00 |
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Thomas Harte
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fa18b06dbf
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Correct get_floating_value to be consistent in out-of-bounds behaviour.
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2021-04-15 21:13:36 -04:00 |
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Thomas Harte
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349b9ce502
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Don't post contended accesses other than on the +2a/+3.
Those machines have an actual latch for this stuff, the others don't.
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2021-04-15 21:13:06 -04:00 |
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Thomas Harte
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71cf63bd35
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Corrects internal cycle contention.
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2021-04-15 19:17:11 -04:00 |
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Thomas Harte
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d1bb3aada4
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Attempts to complete the in-machine application of contention.
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2021-04-15 18:57:34 -04:00 |
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Thomas Harte
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b4214c6e08
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Blocks off the AY from inputs in 48kb mode.
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2021-04-15 18:04:16 -04:00 |
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Thomas Harte
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f5c7746493
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Extends fast loading support to the just-introduced models.
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2021-04-15 17:31:42 -04:00 |
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Thomas Harte
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f10ec80153
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Gets started on different video timings.
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2021-04-14 22:23:27 -04:00 |
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Thomas Harte
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0af405aa46
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Starts working in the 48kb and 128kb Spectrums.
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2021-04-14 21:37:10 -04:00 |
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Thomas Harte
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60e8273de2
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Tweaks video timing, again.
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2021-04-06 21:04:54 -04:00 |
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Thomas Harte
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dd28246f9f
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Better indicate interrupt timing.
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2021-04-06 12:06:13 -04:00 |
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Thomas Harte
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fd88071c0a
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Remove further detritus.
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2021-04-05 17:21:26 -04:00 |
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Thomas Harte
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16bfe1a55c
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Resolves use-after-return memory error.
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2021-04-04 22:45:56 -04:00 |
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Thomas Harte
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90c3d6a1e8
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Attempts a later interception of tape loading.
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2021-04-04 22:39:30 -04:00 |
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Thomas Harte
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f26bf4b9e4
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Splitting here isn't achieving anything.
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2021-04-04 19:52:38 -04:00 |
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Thomas Harte
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1da51bee6c
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14368 and six seem to be the proper numbers, per my comprehension of Patrick Rak.
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2021-04-04 19:52:19 -04:00 |
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Thomas Harte
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5a66956221
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Merge branch 'master' into SpeccyTiming
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2021-04-04 19:12:37 -04:00 |
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Thomas Harte
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d77ddaf4fa
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Switches the Electron to JustInTimeActor video.
Also reorders template parameters; I think that specifying a different time base is likely to be more common than using a divider.
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2021-04-04 17:33:49 -04:00 |
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Thomas Harte
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afb4e6d37d
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Merge branch 'master' into JITSleeper
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2021-04-04 15:37:19 -04:00 |
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Thomas Harte
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14663bd06b
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I think 3 is what I'm aiming for here.
But this probably isn't correct for IO cycles.
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2021-04-02 07:36:57 -04:00 |
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Thomas Harte
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044ac949ba
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Rearrange fields.
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2021-04-01 12:44:00 -04:00 |
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Thomas Harte
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87317f5673
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Improve documentation, pin down read/write times.
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2021-04-01 12:38:58 -04:00 |
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Thomas Harte
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687c05365e
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Flushes before set_last_contended_area_access.
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2021-03-31 22:52:41 -04:00 |
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Thomas Harte
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4f80523828
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Tweaks contended timing.
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2021-03-31 22:51:20 -04:00 |
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Thomas Harte
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acdbd88b9e
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Merge pull request #896 from TomHarte/FastLoadUponInsert
Ensure CPC and Spectrum update fast-tape flag upon media insertion.
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2021-03-28 11:44:01 -04:00 |
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Thomas Harte
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729edeac6c
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Ensure CPC and Spectrum update fast-tape flag upon media insertion.
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2021-03-27 18:08:46 -04:00 |
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Thomas Harte
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faaa4961ed
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Attempts to rely on JustInTimeActor's built-in ClockingHint::Observer.
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2021-03-26 23:54:08 -04:00 |
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Thomas Harte
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8a11a5832c
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Uses GI::AY38910::Utility far and wide.
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2021-03-26 23:19:47 -04:00 |
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Thomas Harte
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465ecc4a78
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Attempts to implement proper floating bus behaviour.
As per http://sky.relative-path.com/zx/floating_bus.html
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2021-03-24 20:23:33 -04:00 |
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Thomas Harte
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0ac11fc39e
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Add floating bus.
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2021-03-23 17:09:42 -04:00 |
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Thomas Harte
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3d0503a35e
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Adds a genuine Spectrum mapping, tweaks timing.
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2021-03-23 16:59:43 -04:00 |
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