Thomas Harte
0ef42f93ff
Further rounds out decoder.
2021-01-01 11:46:26 -05:00
Thomas Harte
d318ab4e70
Edges further onwards.
2020-12-31 21:12:36 -05:00
Thomas Harte
ebfa35c2c7
Conquers another page of instructions; adds supervisor flag.
2020-12-31 18:14:38 -05:00
Thomas Harte
db50b0fe23
Gets started on 6+10 decoding, places stake as to other fields.
2020-12-31 16:51:31 -05:00
Thomas Harte
233a69a1d8
Decodes operations for the simplest 45.
2020-12-31 16:02:52 -05:00
Thomas Harte
ed63e7ea75
Starts building out a PowerPC decoder.
2020-12-30 22:55:59 -05:00
Thomas Harte
b3ab9fff9b
Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
...
Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
14718b93a4
Improve commentary.
2020-10-19 09:32:50 -04:00
Thomas Harte
76d9893866
Declares address-bus sizes formally.
...
This allows me to fix the final two implicit conversion warnings, albeit that it would have been nice to find a templatey way just to get the type directly from the declaration of `perform_bus_operation`.
2020-10-18 15:08:21 -04:00
Thomas Harte
c3f8982c62
Resolves all internal implicit type-conversion warnings.
...
Chasing those down, it looks like flags were wrong for PLB and PLD. So it's official: warnings help.
2020-10-18 14:55:17 -04:00
Thomas Harte
99eba2f8ba
Ensures intended 65816 exception behaviour.
...
i.e. the relevant micro-op sequence exists, and its operation isn't lost. Also sets the 65816 by default to jump straight into power-on, not to execute an instruction first. That shouldn't make a functional difference, but it makes debugging easier because it makes startup fully deterministic.
2020-10-18 14:43:47 -04:00
Thomas Harte
e5f57ea743
Make isReadOperation more overt.
2020-10-17 22:27:04 -04:00
Thomas Harte
3b398f7a9a
Attempts to complete all 65816 bus signalling.
2020-10-16 21:56:20 -04:00
Thomas Harte
096add7551
Exposes non-BusOperation bus outputs.
2020-10-16 21:05:42 -04:00
Thomas Harte
334e0666b7
Reports ::Ready upon a WAI.
2020-10-15 21:37:37 -04:00
Thomas Harte
98c81749c8
Adds the conventional flush.
2020-10-15 21:36:04 -04:00
Thomas Harte
5dcf720bb5
Extends list of BusOperations.
...
Now to retest, widely.
2020-10-15 21:35:01 -04:00
Thomas Harte
9c0c0255f6
Ensures data/program bank can't accidentally be set to 16-bit values.
2020-10-15 21:10:32 -04:00
Thomas Harte
68c15bd605
Updates Qt project; catches another couple of issues via its compiler.
2020-10-15 21:09:22 -04:00
Thomas Harte
9a2f32795f
Revokes stack-local storage non-optimisation.
2020-10-15 21:03:10 -04:00
Thomas Harte
7aa6cf4c6b
Tidies up layout very slightly.
2020-10-15 20:51:23 -04:00
Thomas Harte
dfda2adf0d
Attempts implementations of both ready and abort.
...
Which I think concludes the inputs?
2020-10-15 20:46:18 -04:00
Thomas Harte
c0a1c34012
Wraps all registers into a struct, so that I can implement abort.
...
Makes some preparations for ready too.
2020-10-15 18:42:38 -04:00
Thomas Harte
3c6adc1ff4
Completes 65816 addressing mode tests and corresponding fixes.
2020-10-14 22:00:52 -04:00
Thomas Harte
e511d33a7c
Adds test for [d], y; fixes implementation.
2020-10-14 21:42:41 -04:00
Thomas Harte
27afb8f0a7
Adds direct indirect long test, and thereby fixes addressing mode.
...
Nine to go!
2020-10-14 21:26:20 -04:00
Thomas Harte
327ab81436
Fills in direct, x and (direct) tests, fixing implementation of the latter.
...
10 to go.
2020-10-14 21:17:28 -04:00
Thomas Harte
b22aa5d699
Starts transcribing the addressing examples I have into tests.
...
Correspondingly extends the exposed register set and test-machine addressing range.
2020-10-13 21:38:30 -04:00
Thomas Harte
3e6a2adaaf
Corrects absolute, x and absolute, y addressing modes.
2020-10-13 20:30:39 -04:00
Thomas Harte
8f5537aaaa
Attempts to resolve my direct-indirect addressing stumble.
2020-10-13 20:21:53 -04:00
Thomas Harte
a15d4a156b
Starts trying to ensure appropriate address wrapping.
2020-10-12 22:33:43 -04:00
Thomas Harte
7479dc74ed
Removes printf. It's no longer telling me anything.
2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a
Introduces Jeek816 test case.
2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec
Corrects 16-bit read-modify-write.
...
Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f
Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing.
2020-10-11 22:02:46 -04:00
Thomas Harte
3039a445f0
Ups the 65816 test machine to a full 16mb RAM.
2020-10-11 21:18:01 -04:00
Thomas Harte
82797fd395
Attempts to do the proper thing for interrupts.
2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0
Implements STP and WAI.
...
Albeit still without fully-implemented reactions to exceptions in general.
2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3
Attempts proactively to ensure proper RTI behaviour on the 65816.
2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985
Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
...
This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767
I don't think RTL is needed; JML looks like it covers it.
2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac
Takes a short at TSB and TRB.
...
Three to go.
2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580
Implements TCD, TDC, TCS, TSC.
2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be
Implements XBA and XCE.
2020-10-10 21:34:22 -04:00
Thomas Harte
ae87728770
Ensures M and X are exposed to the public interface.
2020-10-10 21:33:56 -04:00
Thomas Harte
28c8ba70c1
Implements REP and SEP and exposes the MX flags generally.
2020-10-10 21:23:59 -04:00
Thomas Harte
6892ac13e8
Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass.
2020-10-10 17:47:33 -04:00
Thomas Harte
0fe09cd1e4
Knocks SBC into producing likely results; disables Lorenz testing.
2020-10-10 17:13:16 -04:00
Thomas Harte
da4702851f
Fixes ADC.
2020-10-10 16:29:48 -04:00
Thomas Harte
d17c90edf7
Corrects ROL d, x.
2020-10-10 11:25:14 -04:00
