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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 23:52:26 +00:00
Commit Graph

30 Commits

Author SHA1 Message Date
Thomas Harte
33e2721eb2 Fully embraces forceinline. 2019-07-08 21:11:31 -04:00
Thomas Harte
dd963d6161 Eliminates call/return cost on WrappedInts. 2019-07-07 14:12:20 -04:00
Thomas Harte
a99ebda513 Takes a first shot at (inverted) Mac video output. 2019-05-04 22:27:58 -04:00
Thomas Harte
b40211d2c0 Starts to bend 'CRTMachine' to a world farther from owning the GPU relationship. 2018-11-03 21:54:25 -04:00
Thomas Harte
5547c39c91 Corrects documentation. 2018-08-24 20:06:40 -04:00
Thomas Harte
97a89aaf4d Factors out the stuff of deferred action interleaving, as I suspect it'll come in handy. 2018-08-24 20:04:26 -04:00
Thomas Harte
abca38a548 Makes an initial removal of PCMPatchedTrack. Farewell, old friend. 2018-07-01 22:49:57 -04:00
Thomas Harte
6c16754a6b Strips further improper constexprs. 2018-05-28 17:48:55 -04:00
Thomas Harte
ad5afe21ee Removes constexpr from things which are not const. Duh. 2018-05-28 17:28:57 -04:00
Thomas Harte
8a566cc1dd Experimentally goes to town on constexpr. 2018-05-28 17:20:11 -04:00
Thomas Harte
db8d8d8404 Commutes Sleeper to ClockingHint::Source, making state more granular. 2018-05-27 23:17:06 -04:00
Thomas Harte
5d6b5d9f10 Eliminates all emdashes in cross-platform code. 2018-05-13 15:34:31 -04:00
Thomas Harte
0b771ce61a Removes all instances of the copyright symbol. 2018-05-13 15:19:52 -04:00
Thomas Harte
10c0e687f5 Attempts to introduce sleeping for the Disk II. 2018-04-29 17:51:10 -04:00
Thomas Harte
da3d65c18f Devolves time to cycle conversion to machines.
Thereby avoids a whole bunch of complicated machinations that would otherwise have been required of the multimachine.
2018-03-21 22:18:13 -04:00
Thomas Harte
fe7fc6b22e Enables AY output from the MSX. 2017-12-02 16:30:43 -05:00
Thomas Harte
2c1e99858b Fixed HalfCycles to allow conversion from Cycles without relying on undefined behaviour.
Specifically: left shifting a negative number.
2017-10-17 22:22:51 -04:00
Thomas Harte
40d7a603db Ensured that forceinline does nothing in debug builds. 2017-08-21 22:04:15 -04:00
Thomas Harte
ee71be0e7e Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable. 2017-08-21 21:56:42 -04:00
Thomas Harte
49285e9caa Attempted to implement Sleeper in Drive and therefore in DiskController. Also corrected a couple of nonconformant file names. 2017-08-20 11:54:54 -04:00
Thomas Harte
cedb809c21 Sketched out a protocol designed to save processing time on anything that may sleep — probably just disk controllers for now but one can easily imagine it being applicable to printers, and possibly sound chips with suitable changes in guarantee for sound packet receivers. 2017-08-20 10:53:25 -04:00
Thomas Harte
f7e66dea61 Added a compound divide and convert. 2017-08-02 07:21:21 -04:00
Thomas Harte
6ca07f1e28 I guess it might end up living somewhere else, but introduced a header with the compiler-specific stuff to allow me to force things inline. 2017-08-01 22:04:58 -04:00
Thomas Harte
9c04d851e4 Added the basics necessary to get the CPU ticking over, at a nominal 4Mhz but with the wait states that I currently believe to be accurate. 2017-07-31 07:29:50 -04:00
Thomas Harte
4abd62e62b Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty. 2017-07-27 22:05:29 -04:00
Thomas Harte
968d2bb8ba Brought Typer into the new run_for orthodoxy, making it easier to clock consistently regardless of unit. Which necessitated adding a negative operator for WrappedInts. 2017-07-27 21:53:45 -04:00
Thomas Harte
9ef232157b Revoked the operator bool() on WrappedInt as providing an indirect means for implicit but incorrect assignment to unwrapped ints. Got explicit about run_for intention and simplified HalfClockReceiver slightly by building a lossy and a flushing conversion to Cycles into HalfCycles. Adapted the all-RAM Z80 properly to return HalfCycles. 2017-07-27 21:38:50 -04:00
Thomas Harte
6f8b558724 Revoked dead #include. 2017-07-27 07:41:59 -04:00
Thomas Harte
8361756dc4 Switched definitively to the works-for-now approach of requiring an explicit opt-in where somebody wants to clock a whole-cycle receiver from a half-cycle clock. 2017-07-27 07:40:02 -04:00
Thomas Harte
75d67ee770 Relocated ClockReceiver.hpp as it's a dependency for parts of the static analyser, and therefore needs to be distinct from the actual emulation parts. 2017-07-25 20:20:55 -04:00