Thomas Harte
1653abdf88
Adds the .lst; otherwise I'll probably just lose it.
2020-10-19 20:58:24 -04:00
Thomas Harte
b3ab9fff9b
Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
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Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
14718b93a4
Improve commentary.
2020-10-19 09:32:50 -04:00
Thomas Harte
69450e27ad
Merge pull request #839 from TomHarte/65816
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Adds emulation of the 65816.
2020-10-18 21:49:46 -04:00
Thomas Harte
0cd08aa79d
Permits the Oric analyser to check CPC-style DSKs.
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Oric Mist seems to use that format, so some of these now exist out in the wild.
2020-10-18 21:44:44 -04:00
Thomas Harte
1fa94e1b08
Adds the 65816 as an in-code option for Oric emulation.
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This also means it'll be exposed via the SDL build, but that's okay.
2020-10-18 21:43:08 -04:00
Thomas Harte
76d9893866
Declares address-bus sizes formally.
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This allows me to fix the final two implicit conversion warnings, albeit that it would have been nice to find a templatey way just to get the type directly from the declaration of `perform_bus_operation`.
2020-10-18 15:08:21 -04:00
Thomas Harte
c3f8982c62
Resolves all internal implicit type-conversion warnings.
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Chasing those down, it looks like flags were wrong for PLB and PLD. So it's official: warnings help.
2020-10-18 14:55:17 -04:00
Thomas Harte
99eba2f8ba
Ensures intended 65816 exception behaviour.
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i.e. the relevant micro-op sequence exists, and its operation isn't lost. Also sets the 65816 by default to jump straight into power-on, not to execute an instruction first. That shouldn't make a functional difference, but it makes debugging easier because it makes startup fully deterministic.
2020-10-18 14:43:47 -04:00
Thomas Harte
69509f6502
Attempts to bring a little more consistency to my use of Swift in test code.
2020-10-17 22:42:54 -04:00
Thomas Harte
c3187fdbe1
Makes minor formatting improvement.
2020-10-17 22:31:51 -04:00
Thomas Harte
42228ea955
Adds 65C02As6502 test, to round out the set.
2020-10-17 22:31:32 -04:00
Thomas Harte
e5f57ea743
Make isReadOperation
more overt.
2020-10-17 22:27:04 -04:00
Thomas Harte
3b398f7a9a
Attempts to complete all 65816 bus signalling.
2020-10-16 21:56:20 -04:00
Thomas Harte
096add7551
Exposes non-BusOperation bus outputs.
2020-10-16 21:05:42 -04:00
Thomas Harte
334e0666b7
Reports ::Ready upon a WAI.
2020-10-15 21:37:37 -04:00
Thomas Harte
98c81749c8
Adds the conventional flush
.
2020-10-15 21:36:04 -04:00
Thomas Harte
5dcf720bb5
Extends list of BusOperations.
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Now to retest, widely.
2020-10-15 21:35:01 -04:00
Thomas Harte
9c0c0255f6
Ensures data/program bank can't accidentally be set to 16-bit values.
2020-10-15 21:10:32 -04:00
Thomas Harte
68c15bd605
Updates Qt project; catches another couple of issues via its compiler.
2020-10-15 21:09:22 -04:00
Thomas Harte
9a2f32795f
Revokes stack-local storage non-optimisation.
2020-10-15 21:03:10 -04:00
Thomas Harte
7aa6cf4c6b
Tidies up layout very slightly.
2020-10-15 20:51:23 -04:00
Thomas Harte
dfda2adf0d
Attempts implementations of both ready and abort.
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Which I think concludes the inputs?
2020-10-15 20:46:18 -04:00
Thomas Harte
c0a1c34012
Wraps all registers into a struct, so that I can implement abort.
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Makes some preparations for ready too.
2020-10-15 18:42:38 -04:00
Thomas Harte
3c6adc1ff4
Completes 65816 addressing mode tests and corresponding fixes.
2020-10-14 22:00:52 -04:00
Thomas Harte
e511d33a7c
Adds test for [d], y; fixes implementation.
2020-10-14 21:42:41 -04:00
Thomas Harte
c35969d677
Adds tests for (d, x) and (d), y. Both amply tested in emulation mode, so no problems.
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Five to go, all potentially troublesome.
2020-10-14 21:38:00 -04:00
Thomas Harte
27afb8f0a7
Adds direct indirect long test, and thereby fixes addressing mode.
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Nine to go!
2020-10-14 21:26:20 -04:00
Thomas Harte
327ab81436
Fills in direct, x and (direct) tests, fixing implementation of the latter.
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10 to go.
2020-10-14 21:17:28 -04:00
Thomas Harte
db7178495f
Implements direct and final absolute test.
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14 to go.
2020-10-14 20:57:47 -04:00
Thomas Harte
979186e71d
Transcribes the English-language versions of the outstanding tests.
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Passing these will make me willing to call the 65816 functionality provisionally done, other than making sureI signal VPA, VDA, VPB, etc, correctly.
2020-10-14 13:56:37 -04:00
Thomas Harte
f05e0d956b
Adds a TODO list in order to keep an end in sight.
2020-10-13 21:43:42 -04:00
Thomas Harte
b22aa5d699
Starts transcribing the addressing examples I have into tests.
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Correspondingly extends the exposed register set and test-machine addressing range.
2020-10-13 21:38:30 -04:00
Thomas Harte
3e6a2adaaf
Corrects absolute, x and absolute, y addressing modes.
2020-10-13 20:30:39 -04:00
Thomas Harte
8f5537aaaa
Attempts to resolve my direct-indirect addressing stumble.
2020-10-13 20:21:53 -04:00
Thomas Harte
a15d4a156b
Starts trying to ensure appropriate address wrapping.
2020-10-12 22:33:43 -04:00
Thomas Harte
6a47571d17
Stops truncating tests by two bytes.
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Not that it seems to have been problematic.
2020-10-12 21:53:27 -04:00
Thomas Harte
7479dc74ed
Removes printf. It's no longer telling me anything.
2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a
Introduces Jeek816 test case.
2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec
Corrects 16-bit read-modify-write.
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Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f
Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing.
2020-10-11 22:02:46 -04:00
Thomas Harte
3039a445f0
Ups the 65816 test machine to a full 16mb RAM.
2020-10-11 21:18:01 -04:00
Thomas Harte
82797fd395
Attempts to do the proper thing for interrupts.
2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0
Implements STP and WAI.
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Albeit still without fully-implemented reactions to exceptions in general.
2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3
Attempts proactively to ensure proper RTI behaviour on the 65816.
2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985
Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
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This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767
I don't think RTL is needed; JML looks like it covers it.
2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac
Takes a short at TSB and TRB.
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Three to go.
2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580
Implements TCD, TDC, TCS, TSC.
2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be
Implements XBA and XCE.
2020-10-10 21:34:22 -04:00