Thomas Harte
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b440fed323
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Fixed a couple of incorrect references to horizontal constants or calculations where the intention is to use vertical.
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2015-08-13 18:29:07 +01:00 |
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Thomas Harte
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323aa27e13
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Fixed: paging is based directly on the access, independent of the read/write line (since it isn't actually exposed to catridges).
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2015-08-13 15:04:30 +01:00 |
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Thomas Harte
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59c872ada6
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Attempted to reintroduce suitably noted emergency flyback. To re-enable auto-selection of PAL.
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2015-08-13 14:55:53 +01:00 |
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Thomas Harte
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9838e01cc1
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Made a first attempt at paging.
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2015-08-13 13:24:02 +01:00 |
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Thomas Harte
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9ca57b80a7
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Minor steps to help with diagnostics; all commented out or merely to benefit with breakpoint placement.
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2015-08-13 08:43:10 +01:00 |
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Thomas Harte
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cc98534f94
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Added test for NOP, discovering the undocumented ones to be the incorrect length.
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2015-08-13 07:32:50 +01:00 |
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Thomas Harte
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6616265d93
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Fixed collision tests, added a few more timing tests.
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2015-08-13 03:33:45 +01:00 |
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Thomas Harte
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dd0f17130a
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Found and fixed some timing errors in absolute indexed and in (indirect), y addressing modes: neither is able in write or read-modify-write modes to shave a cycle as then can when reading.
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2015-08-13 02:58:39 +01:00 |
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Thomas Harte
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975836c30f
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Added a quick snippet test, discovering that I've cut a cycle from read/modify/writes.
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2015-08-13 02:18:41 +01:00 |
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Thomas Harte
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503d684af0
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Added a couple of timing tests, both of which seem to pass for now.
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2015-08-13 01:55:23 +01:00 |
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Thomas Harte
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e8f70398c1
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Added one basic timing test, for now: implied nop should be two cycles.
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2015-08-13 01:06:56 +01:00 |
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Thomas Harte
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d19f8ed507
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Removed the implicit reset upon 6502 startup, adding a reset line. Hence all tests now pass again. Added an empty shell for timing tests, the all-RAM 6502 now counting bus cycles.
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2015-08-13 00:51:06 +01:00 |
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Thomas Harte
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687816d470
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Made some attempted simplifications, implemented collisions.
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2015-08-13 00:31:57 +01:00 |
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Thomas Harte
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aebf636528
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Ensured the PIA timer resumes its normal tick rate after being read; fixed those spaces that had crept in where tabs should be.
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2015-08-10 16:55:16 +01:00 |
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Thomas Harte
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42677f5f83
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Fixed association of motion registers and actual registers.
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2015-08-10 16:43:45 +01:00 |
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Thomas Harte
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0e52b7365e
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Removed redundant code.
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2015-08-10 16:42:25 +01:00 |
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Thomas Harte
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2dde2efff0
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Attempted to standardise object counters.
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2015-08-10 15:09:40 +01:00 |
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Thomas Harte
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a228969655
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This should happen every fourth cycle.
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2015-08-10 08:16:17 +01:00 |
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Thomas Harte
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3c27306a8e
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My counter was going the wrong way.
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2015-08-10 00:33:37 +01:00 |
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Thomas Harte
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a4e52cc4db
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Made an attempt to switch to a hardware-accurate object timer model. Without yet perfect success.
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2015-08-10 00:20:18 +01:00 |
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Thomas Harte
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cd67e31e64
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Made a first attempt at switching a little closer to TIA's real internal counter setup.
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2015-08-09 22:47:11 +01:00 |
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Thomas Harte
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987be65a59
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Made a quick attempt at reimplementing skip-to-the-end logic for ready waits.
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2015-08-09 02:42:01 -04:00 |
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Thomas Harte
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eb23a493e5
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Switched back to one texel per colour clock, at least for now. Attempted to break _RGBA assumption within the cathode ray view.
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2015-08-05 23:36:04 -04:00 |
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Thomas Harte
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fd36f13baf
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The cathode ray view no longer hard codes the frame size. So that's one less coupling. Doubled pixel output size to give sufficient sampling detail to capture the NTSC colour clock (ummm, hopefully).
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2015-08-05 21:45:47 -04:00 |
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Thomas Harte
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67e82c713f
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Broke assumption that every item in a vertex description is a short, specifically turning lateral into a byte. Which buys me a byte for phase, if that's sufficient.
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2015-08-05 21:12:33 -04:00 |
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Thomas Harte
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5644b3a1cc
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Fixed scanline sizing and fill issues, as well as shortening vsync to the correct Atari length.
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2015-08-05 20:55:27 -04:00 |
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Thomas Harte
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265d1d5b24
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Merge branch 'EdgeTriggeredVSync'
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2015-08-05 20:30:02 -04:00 |
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Thomas Harte
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84d1c2e47d
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Fixed end of sync time calculation and ensured the pretend capacitor is emptied by the decision to retrace and doesn't refill during retrace.
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2015-08-05 20:29:20 -04:00 |
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Thomas Harte
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04c2640b15
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Made a quick attempt to allow vsync triggers only on the raising edge of a sync signal. Will need to investigate more thoroughly.
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2015-08-03 08:42:05 -04:00 |
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Thomas Harte
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5313b48ebd
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I'm ashamed to admit, I: played with numbers until enough things looked stable such that I can investigate other things. Discovery: my PAL autodetection was way off. Fixed, hopefully.
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2015-08-02 20:32:18 -04:00 |
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Thomas Harte
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55017b78a5
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Made an attempt to unify my variable storage (and, technically, to get beam size correct across the frame).
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2015-08-02 19:30:45 -04:00 |
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Thomas Harte
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6e52e5df1c
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Full separate 'lateral' usage is go. Also probably at some point I need to throw in a phase property, which this new flexibility will help with.
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2015-08-02 14:32:29 -04:00 |
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Thomas Harte
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3ab6585789
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Started making the format of data included in a CRTFrame less a matter of variously hard-coded magic constants. Which will allow me to separate the idea of an internal lateral position from the direct texture coordinate, avoiding precision sampling errors at the top and bottom.
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2015-08-02 14:25:21 -04:00 |
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Thomas Harte
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be421587ad
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Eliminated the vertical retrace counter; vertical retrace ends when the beam gets back to the top.
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2015-08-02 13:48:35 -04:00 |
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Thomas Harte
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de4f2bf5dd
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Maybe the 10 lines resource I saw meant 10 lines including charge time?
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2015-07-31 19:00:40 -04:00 |
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Thomas Harte
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5f1d76e855
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Can't seem to find any documentation: assumed horizontal sync is generated during vertical.
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2015-07-31 18:49:02 -04:00 |
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Thomas Harte
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c1a12ad4df
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Fix to make sure end of vertical sync is always correctly spotted as an event, rather than just happening off the books. So I can now watch Joust roll to its heart's content.
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2015-07-31 18:15:59 -04:00 |
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Thomas Harte
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9c91f1a2eb
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Added an attempt at NTSC/PAL autodetection, based on number of missed vertical syncs.
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2015-07-31 18:04:33 -04:00 |
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Thomas Harte
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a5d66e9dd6
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Factored out a few more constants, started trying to ensure there's enough slack and the mechanisms in place for the CathodeRayView to hold onto two frames if it desires, for potential phosphor simulation, switched once again to additive blending — much more like a real CRT — and added a sine function across the width of spans per my understanding of how an electron gun actually fires.
Why do all this when overall timing is still so far off? It helps me more easily see how overall timing is so far off.
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2015-07-31 17:47:10 -04:00 |
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Thomas Harte
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c1d1fb65cb
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Made an attempt properly to emulate the RDY line and the Atari's use of it.
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2015-07-31 16:54:20 -04:00 |
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Thomas Harte
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53dd5c8f16
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Trying to fix my RDY line emulation. Switched to PAL timings, at least temporarily, since it's starting to make a difference.
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2015-07-31 16:44:53 -04:00 |
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Thomas Harte
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e4615cda2e
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Switched back to unrealistic solid raster beams for the time being.
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2015-07-30 23:01:59 -04:00 |
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Thomas Harte
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39bfbf1000
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Attempted ball graphics enable delay.
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2015-07-30 23:01:28 -04:00 |
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Thomas Harte
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6ad3fbbaf2
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Slowed flywheel adjustments a little, the better to highlight phase errors for the time being.
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2015-07-30 23:00:54 -04:00 |
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Thomas Harte
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78e66d2577
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Added an attempt at ball rendering.
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2015-07-30 21:30:00 -04:00 |
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Thomas Harte
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cfe758daa0
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A tweak here, a tweak there, to help with debugging.
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2015-07-30 21:29:40 -04:00 |
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Thomas Harte
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a95b36a53d
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Made first attempt at missile display. In Enduro, at least, one seems to work but the other seems to be absent.
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2015-07-30 21:09:18 -04:00 |
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Thomas Harte
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1b7846f09b
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Made a first attempt at the sprite latches. Hopefully this should make a few more Activision logos, etc, show up correctly.
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2015-07-30 20:52:26 -04:00 |
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Thomas Harte
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20c2d98b9a
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Converted remaining spaces to real tabs.
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2015-07-30 20:51:32 -04:00 |
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Thomas Harte
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1fa7a77793
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Continuing in my attempts to figure out the complete absence of graphics from some games: there are 262 lines on an NTSC screen, not 256. Also ensured that the CRT has a little spare range at the edges so that its generated triangles don't wrap around just because of integer overflow.
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2015-07-30 20:07:20 -04:00 |
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