Thomas Harte
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3d22fe0d1b
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Attempt FIRQ, IRQ and NMI responses.
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2026-03-17 11:35:41 -04:00 |
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Thomas Harte
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1f6f103346
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Implement HALT.
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2026-03-17 11:17:40 -04:00 |
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Thomas Harte
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14ed0e0ec7
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Implement RESET.
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2026-03-17 00:06:58 -04:00 |
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Thomas Harte
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7df8370c3b
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Ensure tab doesn't appear.
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2026-03-17 00:00:42 -04:00 |
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Thomas Harte
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fbb24e04e0
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Generalise extended addressing; get as much as possible from tests.
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2026-03-16 23:58:41 -04:00 |
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Thomas Harte
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b2ebd56458
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Test decrements, no offsets and A/B offsets.
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2026-03-16 19:46:16 -04:00 |
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Thomas Harte
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5e07672fa4
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Start testing and simplify indexed address decoder.
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2026-03-16 18:27:50 -04:00 |
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Thomas Harte
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873f10a0d8
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Disambiguate PostincrementBy1 and Offset8bit.
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2026-03-16 18:09:49 -04:00 |
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Thomas Harte
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948e49312b
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Attempt MRDY version of write.
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2026-03-16 17:49:45 -04:00 |
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Thomas Harte
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90efb6474f
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Test final RAM state, to an extent.
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2026-03-16 15:23:40 -04:00 |
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Thomas Harte
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611202bd83
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Correct CMPY genus.
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2026-03-16 15:13:17 -04:00 |
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Thomas Harte
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a6d97d5419
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Fix LDY, LDS genuses.
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2026-03-16 15:11:57 -04:00 |
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Thomas Harte
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efc381bebe
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Remove redundant checks.
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2026-03-16 15:04:47 -04:00 |
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Thomas Harte
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d787af89c5
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Write ADDD result back.
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2026-03-16 15:03:48 -04:00 |
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Thomas Harte
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b825d07a70
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Handle SWI discrepancies.
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2026-03-16 15:01:46 -04:00 |
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Thomas Harte
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72a1a49ac5
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Strip now-working CMPs.
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2026-03-16 14:52:51 -04:00 |
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Thomas Harte
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d4f89888c9
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Fix ADC flags.
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2026-03-16 14:48:23 -04:00 |
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Thomas Harte
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69823ac117
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Correct various subtraction flags.
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2026-03-16 14:43:11 -04:00 |
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Thomas Harte
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da2f9aab1c
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Fix MUL flags.
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2026-03-16 14:30:14 -04:00 |
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Thomas Harte
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022ec35f2b
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Determine the full scope of failures.
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2026-03-16 14:26:53 -04:00 |
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Thomas Harte
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38b00373c2
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LEA operates differently than LD with regard to flags.
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2026-03-16 12:28:11 -04:00 |
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Thomas Harte
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216d947e64
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Add assert, continue filtering test set for sanity.
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2026-03-16 12:13:09 -04:00 |
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Thomas Harte
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4aad105c54
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Limit CC testing where helpful.
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2026-03-16 11:29:02 -04:00 |
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Thomas Harte
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e1b5c5b8da
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Ensure low DAA addition rolls over into high.
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2026-03-16 11:18:37 -04:00 |
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Thomas Harte
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299d6bc562
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Fix LBSR test.
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2026-03-16 11:04:47 -04:00 |
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Thomas Harte
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84b5292f0a
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Don't let a JMP target set flags.
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2026-03-16 11:00:22 -04:00 |
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Thomas Harte
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ec1595a55c
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Fix LSL overflow.
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2026-03-16 10:56:26 -04:00 |
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Thomas Harte
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fb17692826
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Test everything except illegal opcodes.
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2026-03-16 10:49:20 -04:00 |
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Thomas Harte
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7c3211a835
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Correct carry after NEG.
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2026-03-16 10:40:06 -04:00 |
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Thomas Harte
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3d911e3439
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Attempt to use precomputed test case.
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2026-03-16 10:37:16 -04:00 |
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Thomas Harte
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01f884fa17
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Revive test cases.
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2026-03-16 10:13:24 -04:00 |
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Thomas Harte
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a0198b6f41
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Implement RTI.
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2026-03-15 23:01:22 -04:00 |
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Thomas Harte
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bbaa7d74d4
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Implement push, fix post-increment by 1.
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2026-03-15 22:46:05 -04:00 |
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Thomas Harte
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ff58307b2b
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Avoid accidental increment and decrements in 5-bit offset mode.
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2026-03-15 21:04:04 -04:00 |
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Thomas Harte
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34751ba04c
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Lock in pre- versus post- behaviour.
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2026-03-15 13:41:23 -04:00 |
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Thomas Harte
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5c39a924d7
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Implement SWI. Making me suspect an error in indexed decrementing.
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2026-03-15 13:03:17 -04:00 |
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Thomas Harte
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aec2a1b65a
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Implement BSR and LBSR.
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2026-03-15 12:46:26 -04:00 |
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Thomas Harte
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cefd67be57
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Correct JMP, implement extended indirect addressing.
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2026-03-15 12:40:54 -04:00 |
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Thomas Harte
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a4f1921ca8
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Compact logging.
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2026-03-15 00:31:46 -04:00 |
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Thomas Harte
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9123bad823
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Fix JMP fetch length.
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2026-03-15 00:06:14 -04:00 |
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Thomas Harte
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9111fe5cdf
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Shuffle RESET into the specialised camp.
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2026-03-15 00:02:32 -04:00 |
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Thomas Harte
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a5268c4372
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Take a shot at RTS.
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2026-03-15 00:00:12 -04:00 |
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Thomas Harte
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91d844dba0
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Correct written values, JSR.
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2026-03-14 23:54:43 -04:00 |
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Thomas Harte
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df9ff6085c
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Introduce category for irregular operations; implement PUL.
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2026-03-14 23:36:18 -04:00 |
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Thomas Harte
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91a9c90f9c
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Fix immediate 8 -> 16 mapping step.
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2026-03-14 16:33:28 -04:00 |
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Thomas Harte
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4dc330e0f2
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Add further debugging aids.
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2026-03-14 12:50:03 -04:00 |
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Thomas Harte
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28430bd9d3
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Add some rudimentary RAM.
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2026-03-14 12:28:37 -04:00 |
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Thomas Harte
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59ff1a5731
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Swallow an extra dynamic dispatch for clarity.
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2026-03-14 12:24:21 -04:00 |
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Thomas Harte
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cd9fcd667d
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Implement enough 6809 to go off the rails.
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2026-03-14 12:06:50 -04:00 |
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Thomas Harte
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d82abaeeb3
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Expand definition to include operand size.
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2026-03-14 11:50:05 -04:00 |
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