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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00
Commit Graph

147 Commits

Author SHA1 Message Date
Thomas Harte
1c154131f9 Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate. 2019-10-29 22:36:29 -04:00
Thomas Harte
d97348dd38 Eliminates dangling uses of printf. 2019-03-02 18:07:05 -05:00
Thomas Harte
601961deeb Wires through set_display_type. 2018-11-29 20:44:21 -08:00
Thomas Harte
64465f97b6 Starts towards reintroducing the proper mechanisms for selecting a display type at runtime. 2018-11-28 17:53:33 -08:00
Thomas Harte
5618288459 Reduces visible area, producing a tighter crop. 2018-11-25 22:32:12 -05:00
Thomas Harte
ee89be6730 Removes many stray spaces. 2018-11-23 22:32:32 -05:00
Thomas Harte
770d7e90e9 Removes stale sampling functions. 2018-11-22 22:47:29 -05:00
Thomas Harte
c5d9bf2c12 Optimises slightly for black borders.
Specifically to help to debug proper display of unused lines in the new scan target.
2018-11-17 18:23:42 -05:00
Thomas Harte
15b1176841 Ensures no border output if space is not allocated. 2018-11-14 22:32:33 -05:00
Thomas Harte
9dff13cbbf Re-establishes output from the machines with 9918s and derivatives. 2018-11-14 22:25:19 -05:00
Thomas Harte
6d277fecd5 Makes ScanTarget a little more communicative and orthogonal. 2018-11-10 19:52:57 -05:00
Thomas Harte
f6562de325 Possibly adds enough for the Electron and ZX80 to start outputting dummy lines.
Let's see!
2018-11-03 23:40:39 -04:00
Thomas Harte
b40211d2c0 Starts to bend 'CRTMachine' to a world farther from owning the GPU relationship. 2018-11-03 21:54:25 -04:00
Thomas Harte
da4d883321 Adds first, incomplete attempts to talk to a ScanTarget from the CRT.
Does away with the hassle of `unsigned` while I'm here; that was a schoolboy error.
2018-11-03 19:58:44 -04:00
Thomas Harte
8652d8b23d (Mostly) randomises the 9918 start position. 2018-10-26 21:02:56 -04:00
Thomas Harte
bb09762029 Introduces extra delays to VRAM access. 2018-10-26 20:19:08 -04:00
Thomas Harte
05a5c7120e Shunts CRAM dots into their proper place. 2018-10-26 20:06:51 -04:00
Thomas Harte
521d603902 Adds a first attempt at CRAM dot output. With a TODO. 2018-10-26 19:26:46 -04:00
Thomas Harte
0587b9f257 Edges to within millimetres of CRAM dots.
... but all the way up to bedtime.
2018-10-25 23:12:03 -04:00
Thomas Harte
5accd8cf08 Fixes broken implementation of 9918 multicolour mode. 2018-10-24 22:40:38 -04:00
Thomas Harte
a8645f80bf Introduces 'non-exclusive' emulator-space keyboards.
i.e. sets of keys that don't amount to an entire keyboard in the modern sense. Experimentally used by the Master System for its reset key.
2018-10-24 21:59:30 -04:00
Thomas Harte
d61c3a9442 Fixes sprite list termination in 224- and 240-line modes. 2018-10-24 19:53:46 -04:00
Thomas Harte
00e7958a97 Separates request for an SMS2 VDP from current graphics mode.
Thereby fixes various minor segments of Codemasters games.
2018-10-23 22:19:45 -04:00
Thomas Harte
2f995eb622 Adjusts vertical timing for display height. 2018-10-23 21:20:44 -04:00
Thomas Harte
2cbd28478d Allows the sprite terminator to be specified. 2018-10-23 20:01:47 -04:00
Thomas Harte
7855145ebd Slightly adjusts pixel output time.
i.e. respective to reading; sprite collision times now seem correct.
2018-10-22 19:58:33 -04:00
Thomas Harte
883680731a Uses explicit state to determine whether a pixel target has been requested. 2018-10-21 21:18:41 -04:00
Thomas Harte
c07f9fed99 Corrects test and implementation to pass the exhaustive VDP interrupt prediction test. 2018-10-21 18:42:49 -04:00
Thomas Harte
16f08eb654 Slightly tweaks Master System timing numbers. 2018-10-21 13:58:34 -04:00
Thomas Harte
30b99f0049 Fixes a couple of interrupt prediction errors. 2018-10-20 18:25:28 -04:00
Thomas Harte
b61de65b43 Restores proper phase with the CPU. 2018-10-19 23:18:16 -04:00
Thomas Harte
0822c96ce0 Implements the proper row counter values for > 192 row modes. 2018-10-19 22:37:56 -04:00
Thomas Harte
f9a6c00493 Makes first attempt to support PAL timings. 2018-10-19 21:36:13 -04:00
Thomas Harte
9bc09046c0 Attempts to ensure that sprites can go off the top of the screen. 2018-10-18 21:48:57 -04:00
Thomas Harte
512f085891 Ensures proper left clipping of sprites. 2018-10-18 21:14:16 -04:00
Thomas Harte
da00c832f5 Corrects colour fetching for multicolour text mode. 2018-10-18 20:38:00 -04:00
Thomas Harte
8ff265c3a1 Corrects multicolour text mode. 2018-10-18 20:25:42 -04:00
Thomas Harte
1fc88c4eff Corrects off-by-one error in line fetching coroutines. 2018-10-16 21:36:31 -04:00
Thomas Harte
58ca74c68a Resolves right-side TMS sprite droppages. 2018-10-16 21:25:08 -04:00
Thomas Harte
b4f871a2ef Corrects first line sprite row selection. 2018-10-16 21:16:29 -04:00
Thomas Harte
0f7bf6d6c6 Resolves attempt to output graphics on the line one before the display. 2018-10-16 21:02:31 -04:00
Thomas Harte
5dfe7d8596 Corrects most of TMS sprite drawing. 2018-10-16 20:49:04 -04:00
Thomas Harte
231009b901 Makes faulty attempt to reintroduce TMS-mode sprites. 2018-10-16 20:00:06 -04:00
Thomas Harte
1c5f939aea Reintroduces tiles and some element of sprites in regular TMS mode. 2018-10-14 21:52:13 -04:00
Thomas Harte
d66979c68f Switched to a very large number of buffers, and resolved stupid attempt to reassign a reference. 2018-10-14 18:19:11 -04:00
Thomas Harte
6c09abc6cb Makes a flawed attempt to reformulate this exactly as two separate processes on a common clock with an interchange buffer.
Specifically because closer inspection of the TMS modes shows it isn't quite valid to model output of one line as having fully completed prior to fetching of the next. So some sort of extra buffer is required. At which point it is most natural to continue with the logic that each fetch routine is oriented around the fetching process for a single line, and each output routine has the same view, suggesting separate read/write addresses.

Something is wrong though, as video data is being output too rapidly (I think) and with occasional sync issues (again: subject to investigation).
2018-10-14 16:23:45 -04:00
Thomas Harte
9e52ead09a Ensures sprite scanning doesn't improperly set collision flag; that slot 151 is filled. 2018-10-12 19:50:48 -04:00
Thomas Harte
9ab0c54426 Eliminates faulty attempt to satisfy SMSVDP vertical counter test. 2018-10-12 18:57:07 -04:00
Thomas Harte
f6af6778ab Moves scrolling latch to proper position and implements 4-window fetching offset. 2018-10-11 22:36:27 -04:00
Thomas Harte
6a94dda60d Selects potentially-correct interrupt times. 2018-10-11 21:42:09 -04:00