Thomas Harte
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3d8f5d4302
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Improve failure logging.
This confirms that it's only the *BCDs and DIVU/DIVS in which I do not match the tests.
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2022-05-12 20:23:32 -04:00 |
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Thomas Harte
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2fa6b2301b
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Move string logic into Preinstruction .
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2022-05-12 19:46:08 -04:00 |
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Thomas Harte
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4ba20132b9
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Avoid repeated allocations on the new path, reducing total runtime by almost two thirds.
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2022-05-12 16:35:41 -04:00 |
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Thomas Harte
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192513656a
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After much guesswork, fix SBCD and thereby pass flamewing tests.
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2022-05-12 11:39:01 -04:00 |
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Thomas Harte
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f3c1b1f052
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Name flags, remove closing underscores on exposed data fields.
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2022-05-12 08:19:41 -04:00 |
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Thomas Harte
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56ce1ec6e8
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No need to subclass.
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2022-05-11 21:25:38 -04:00 |
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Thomas Harte
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de168956e4
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Fix tested operand order.
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2022-05-11 16:44:39 -04:00 |
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Thomas Harte
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5b80844d81
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Add a sanity test count, temporarily.
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2022-05-11 16:34:28 -04:00 |
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Thomas Harte
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17add4b585
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Introduce and overwhelmingly fail the flamewing BCD tests.
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2022-05-11 15:19:39 -04:00 |
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Thomas Harte
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943c924382
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Add missing: MOVE to/from USP, RESET.
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2022-05-11 07:52:23 -04:00 |
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Thomas Harte
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f2a6a12f79
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Remove further vestiges of timing.
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2022-05-09 20:58:51 -04:00 |
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Thomas Harte
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0af8660181
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Remove add_pc and decline_branch in favour of operation-specific signals.
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2022-05-09 16:19:25 -04:00 |
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Thomas Harte
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330ec1b848
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TODO is done.
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2022-05-09 11:52:33 -04:00 |
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Thomas Harte
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539932dc56
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Provide function codes. TODO: optionally.
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2022-05-09 09:18:02 -04:00 |
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Thomas Harte
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5ab5e1270e
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Fix test for new MOVEM semantics.
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2022-05-09 09:17:48 -04:00 |
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Thomas Harte
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98cb9cc1eb
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Fix CHK operand size.
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2022-05-07 21:16:44 -04:00 |
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Thomas Harte
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bf8c97abbb
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Permit TRAP, TRAPV and CHK to push the next PC rather than the current.
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2022-05-07 20:32:39 -04:00 |
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Thomas Harte
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2b3900fd14
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Fix LINK A7.
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2022-05-07 08:15:26 -04:00 |
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Thomas Harte
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1defeca1ad
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Implement RTS, RTR, RTE.
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2022-05-06 12:30:49 -04:00 |
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Thomas Harte
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ac6a9ab631
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Fix TAS Dn.
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2022-05-06 12:23:04 -04:00 |
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Thomas Harte
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8176bb6f79
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Expose issues with TST and TAS.
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2022-05-06 12:18:56 -04:00 |
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Thomas Harte
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9c266d4316
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Proceed to unimplemented TST.
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2022-05-06 11:33:57 -04:00 |
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Thomas Harte
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d478a1b448
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Proceed to next failure: PEA.
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2022-05-06 10:04:20 -04:00 |
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Thomas Harte
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607ddd2f78
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Preserve MOVEM order in Operation .
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2022-05-06 09:45:06 -04:00 |
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Thomas Harte
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06fe320cc0
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Correct source counting, but this leaves the operands still being the wrong way around.
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2022-05-05 21:06:53 -04:00 |
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Thomas Harte
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d7d0a5c15e
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Implement MOVEM to memory.
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2022-05-05 18:51:29 -04:00 |
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Thomas Harte
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47f4bbeec6
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Switch to a contiguous block of 16 registers.
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2022-05-05 15:31:59 -04:00 |
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Thomas Harte
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70cdc2ca9f
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Fix MOVEP to register.
Advance to lack of MOVEM.
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2022-05-05 12:37:47 -04:00 |
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Thomas Harte
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f63a872387
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BTST does not write back.
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2022-05-05 12:32:15 -04:00 |
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Thomas Harte
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46686b4b9c
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Start testing move.
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2022-05-04 20:38:56 -04:00 |
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Thomas Harte
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15c90e546f
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Fix rotates and shifts to memory.
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2022-05-04 19:44:59 -04:00 |
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Thomas Harte
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5aabe01b6d
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Mostly fix LINK and UNLK.
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2022-05-04 08:41:55 -04:00 |
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Thomas Harte
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d3b55a74a5
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Fix LEA, proceed to non-functional LINK and UNLK.
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2022-05-03 20:45:36 -04:00 |
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Thomas Harte
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de58ec71fd
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Fix EXT, SWAP.
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2022-05-03 20:17:36 -04:00 |
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Thomas Harte
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052ba80fd7
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Add enough wiring to complete but fail EXT and JMP/JSR.
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2022-05-03 15:49:55 -04:00 |
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Thomas Harte
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39f0ec7536
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Get far enough through CHK to realise that MOVEM probably needs to be divided by direction.
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2022-05-03 15:40:04 -04:00 |
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Thomas Harte
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af973138df
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Correct decoding of Bcc.b, satisfying Bcc and BSR tests.
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2022-05-03 15:32:54 -04:00 |
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Thomas Harte
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5a87506f3d
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Fix Bcc, making decision that add_pc is relative to start of instruction.
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2022-05-03 15:21:42 -04:00 |
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Thomas Harte
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90f0005cf2
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Proceed to failing Bcc and flagging up my lack of an implementation for BSR.
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2022-05-03 14:45:49 -04:00 |
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Thomas Harte
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d8b3748d24
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Fix Scc size, DBcc behaviour.
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2022-05-03 14:40:51 -04:00 |
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Thomas Harte
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b6ffff5bbd
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Distinguish [ADD/SUB]QA from [ADD/SUB]Q.
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2022-05-03 14:17:26 -04:00 |
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Thomas Harte
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5ebae85a16
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Start recording successes.
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2022-05-03 11:28:50 -04:00 |
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Thomas Harte
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b3cf13775b
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Consume operand_flags into Instruction.hpp.
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2022-05-03 11:09:57 -04:00 |
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Thomas Harte
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2f2d6bc08b
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Correct CMPw.
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2022-05-03 09:05:34 -04:00 |
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Thomas Harte
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fc9a35dd04
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Test add/sub, add an exception for invalid Sequence s.
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2022-05-02 20:09:38 -04:00 |
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Thomas Harte
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3827ecd6d3
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Proceed to complete test running.
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2022-05-02 12:57:45 -04:00 |
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Thomas Harte
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14532867a4
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Sneaks towards testing EXT.
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2022-05-02 08:00:56 -04:00 |
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Thomas Harte
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56fe00c5fb
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Correct errors preparatory to Executor's lack of flow controller actions.
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2022-05-01 20:40:57 -04:00 |
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Thomas Harte
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9cbbb6e508
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Adjust path to match namespace; add to Qt project.
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2022-04-27 08:05:36 -04:00 |
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Thomas Harte
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9908769bb3
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Normalise test name.
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2022-04-26 20:32:39 -04:00 |
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