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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-28 07:29:45 +00:00
Commit Graph

23 Commits

Author SHA1 Message Date
Thomas Harte
5a77f0c93c Implement CALL. 2023-10-09 11:46:59 -04:00
Thomas Harte
4f14210ee0 Remove ideas discarded. 2023-10-08 22:27:01 -04:00
Thomas Harte
f618ca6046 Implement, test AND. 2023-10-08 22:18:40 -04:00
Thomas Harte
e3b18708c7 Handle segment-boundary word accesses.
With all ADDs and ADCs enabled, no remaining failures.
2023-10-08 22:11:05 -04:00
Thomas Harte
bd0b62232f Consider that displacements may always be signed.
Down to 1 failure.
2023-10-08 21:41:36 -04:00
Thomas Harte
dbfaef632a Fix DataPointer reference.
Down from 4521 to 1248 failures within 00.json.gz
2023-10-08 15:59:30 -04:00
Thomas Harte
0d2af80f7f Avoid access issues if there's no index. 2023-10-08 13:50:36 -04:00
Thomas Harte
6f768d9a3d Start climbing towards address resolution. 2023-10-08 13:47:43 -04:00
Thomas Harte
dd3cc1f510 Fix ADD and ADC sign flags. 2023-10-08 13:39:46 -04:00
Thomas Harte
a4b1d2b00a Float out data resolution. 2023-10-08 13:34:28 -04:00
Thomas Harte
b6d000ac5e Add enough wiring to consolidate failure on lazy handling of flags. 2023-10-06 13:22:35 -04:00
Thomas Harte
82f0cd790f Find first failing execution, note reason. 2023-10-06 11:43:18 -04:00
Thomas Harte
2d17d9d316 Execute some tests at some facile level. 2023-10-06 11:31:45 -04:00
Thomas Harte
a0ca0bb3c0 Mark non-templates as inline. 2023-10-06 11:11:29 -04:00
Thomas Harte
c6b311b84a Explain source of comments. 2023-10-06 11:10:54 -04:00
Thomas Harte
28c7d27cac Establish some proportion of state, ready to execute _something_. 2023-10-06 11:07:33 -04:00
Thomas Harte
6d392852d2 Hack on through to something that builds. 2023-10-05 22:27:52 -04:00
Thomas Harte
f411a961a3 Create a central location for avoiding segment conditionality. 2023-10-05 17:12:38 -04:00
Thomas Harte
ada411c0d8 It's differing mildly from DataPointResolver, but segue towards a world of real data. 2023-10-05 17:06:00 -04:00
Thomas Harte
eb100e3b29 Start reforming; data size plus register aren't independent in finding a source. 2023-10-05 16:49:02 -04:00
Thomas Harte
15acb1fc7c Add ADC and ADD. 2023-10-05 15:49:07 -04:00
Thomas Harte
09b2cfad8a Add AAM and AAS. 2023-10-05 14:52:24 -04:00
Thomas Harte
059f300500 Start fleshing out x86 performance. 2023-10-05 14:37:58 -04:00