2725 Commits

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Author	SHA1	Message	Date
Thomas Harte	681d1e2f8d	Breaking its typer for now, adapted the ZX80/81 to having a Z80, not being one.	2017-08-02 22:12:59 -04:00
Thomas Harte	42e70ef993	Adjusted slightly as per Z80 change, and to pull everything internally declared into the Amstrad CPC namespace.	2017-08-02 22:11:03 -04:00
Thomas Harte	039811ce6a	Switched the Z80 to being something a machine has, not something a machine is.	2017-08-02 22:09:59 -04:00
Thomas Harte	a54ccd1969	Merge pull request #168 from TomHarte/CPC ... Adds an initial Amstrad CPC 464 emuation	2017-08-02 20:50:02 -04:00
Thomas Harte	707821ca55	Added the normal readme to explain what's omitted here.	2017-08-02 20:45:14 -04:00
Thomas Harte	d3bf8fa53b	Upped the documentation.	2017-08-02 20:37:26 -04:00
Thomas Harte	f5e2dd410e	Constrained output to the centre 90%.	2017-08-02 19:55:44 -04:00
Thomas Harte	3ca9c38777	Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc.	2017-08-02 19:45:58 -04:00
Thomas Harte	2d2cefb0b0	Adjusted factoring to introduce support for block 10.	2017-08-02 14:36:47 -04:00
Thomas Harte	2fd071e45d	Made an honest attempt at outputting turbo speed data block data. The CPC now at least starts to load.	2017-08-02 14:24:34 -04:00
Thomas Harte	d7a5c3f49a	Added support for the ID 20 block and fixed a minor error in my skip-the-contents version of block 11: length is three bytes long, not two. This gives me enough structure properly to get to the end of my current test CDT, albeit without making any of the noises.	2017-08-02 14:12:34 -04:00
Thomas Harte	819761f9fb	Fixed another uninitialised pointer.	2017-08-02 13:56:35 -04:00
Thomas Harte	e50adf1cc8	Were my TZX support up to it, this would likely be sufficient for tape emulation.	2017-08-02 13:50:14 -04:00
Thomas Harte	dcab10f53e	Ensured the AY's async queue doesn't just fill and fill.	2017-08-02 07:38:35 -04:00
Thomas Harte	633d8965e2	Removed accidental logging commit.	2017-08-02 07:38:14 -04:00
Thomas Harte	f602f9b6ec	Adds an attempt to clock the AY.	2017-08-02 07:21:33 -04:00
Thomas Harte	f7e66dea61	Added a compound divide and convert.	2017-08-02 07:21:21 -04:00
Thomas Harte	bda9441620	Made an attempt to clock the AY.	2017-08-02 07:20:59 -04:00
Thomas Harte	4d5d5041df	Attempted to ensure a clean startup.	2017-08-01 22:18:42 -04:00
Thomas Harte	587eb3a67c	Factored interrupt counting out of the CRTCBusHandler.	2017-08-01 22:15:39 -04:00
Thomas Harte	6ca07f1e28	I guess it might end up living somewhere else, but introduced a header with the compiler-specific stuff to allow me to force things inline.	2017-08-01 22:04:58 -04:00
Thomas Harte	8d39a20088	Added proper output of mode 3, were anything ever to try to use it.	2017-08-01 21:51:41 -04:00
Thomas Harte	4b6370eb86	Realised my colour error: mapping the ROM numbers as though they were the hardware numbers. Having fixed that, spotted that I was deserialising R and B the wrong way around and dividing by too much. Colours now appear to be correct.	2017-08-01 21:47:52 -04:00
Thomas Harte	c6e340a8a2	Wired up the vsync signal. Pen 15 no longer flashes like crazy. Still can't figure out why the palette is so askew; was looking for perhaps some sort of detection of a green screen rather than a colour one, but there's no obvious input for that.	2017-08-01 21:21:59 -04:00
Thomas Harte	31c7153301	Corrected bit to colour mapping for modes 0 and 1. The total palette is still way off but there's consistency between modes now.	2017-08-01 20:52:42 -04:00
Thomas Harte	7e04d00cc1	Fixed key values, causing the new set of keys to work, decreased quantity of output and ensured that pixels appear in modes 0 and 2.	2017-08-01 20:39:10 -04:00
Thomas Harte	9d43784c65	Significantly increased quantity of keys forwarded.	2017-08-01 20:37:55 -04:00
Thomas Harte	eca9586a0f	Fixed: input value is no longer overwritten by 0xff. The '0' key now works.	2017-08-01 20:19:02 -04:00
Thomas Harte	0267bc237f	Added the ability to set a port input, and relaxed bus state testing. I think my on-demand bus reactions here are inappropriate, so more work to do here probably.	2017-08-01 18:04:51 -04:00
Thomas Harte	2e4577f741	Made a game attempt at implementing a (sticky) keyboard. No effect yet.	2017-08-01 17:52:05 -04:00
Thomas Harte	f5b278d683	Added enough stuff to put the emulated Amstrad CPC in a state of knowing whether its '0' key is pressed.	2017-08-01 17:31:56 -04:00
Thomas Harte	e6854ff8db	Corrected typo: the input to an AY is BDIR, not BCDIR.	2017-08-01 17:06:57 -04:00
Thomas Harte	3b292273c7	Fixed: BC2 is always implicitly set. The machine is now periodically checking the AY's register 14 (i.e. the first input port), so probably there's enough here now to implement keyboard input.	2017-08-01 17:05:11 -04:00
Thomas Harte	cb732e5d5f	Made an attempt to wire in an [unclocked] AY, in an endeavour to get to keyboard reading.	2017-08-01 17:01:58 -04:00
Thomas Harte	2d4e202be3	Completed dangling comment.	2017-08-01 17:01:36 -04:00
Thomas Harte	64da8e17d1	Fixed: of course this should take a reference to an existing port handler rather than hatching its own; otherwise additional communication with a port handler by an i8255 owner doesn't work as intended.	2017-08-01 17:01:20 -04:00
Thomas Harte	08ad35efd9	It's barely an implementation of the 8255, but ensured that data is bounced into the PortHandler, conveniently assuming the interaction mode used by the CPC.	2017-08-01 16:34:13 -04:00
Thomas Harte	58b98267fc	Formally transferred ownership of PIO accesses to an incoming template, and decided to start being explicit about how to specify the interfaces and provide fallbacks for optional behaviour for the new, clean generation of interfaces. A full-project sweep will inevitably occur but I'll try to tie off this branch first.	2017-08-01 16:15:19 -04:00
Thomas Harte	ace71280a0	Removed implementation file; this is only ever going to be a template.	2017-08-01 16:00:17 -04:00
Thomas Harte	a27946102a	Took a shot at the interrupt counter. Attempts at keyboard reading now recur so it'll probably do for now. I think that next puts me into the realm of needing to implement the 8255.	2017-08-01 15:49:16 -04:00
Thomas Harte	1d99c116e7	Actually, this is probably more correct: increment and then compare, but increment the refresh address once more after the final character, to avoid repeating it.	2017-08-01 15:29:37 -04:00
Thomas Harte	ee27e16fb1	Switched to post-tests increment. Seems to give proper screen width, but also eliminates that 'compare to +1' step that felt unlikely.	2017-08-01 15:19:25 -04:00
Thomas Harte	6ac7132799	Had a quick go at properly outputting Mode 1, adding wiring to communicate palette and mode changes to the CRTC bus handler. Colours are off but it's sufficient for now.	2017-08-01 15:16:13 -04:00
Thomas Harte	ca42abab70	Doubled up to ensure that every byte that should be inspected is represented. This makes it clearer that I'm on the right road. A garbled version of 'Amstrad 64k Microcomputer' can be discerned, in a weird grayscale and with the right-hand column missing and skewed output as a result.	2017-08-01 07:56:44 -04:00
Thomas Harte	933d69a256	Fixed slightly: the CPC wiki has a typo. It's 12 and 13 that move up to 14 and 15.	2017-08-01 07:51:13 -04:00
Thomas Harte	3b1db14817	Made a quick attempt at properly updating the refresh address.	2017-08-01 07:36:03 -04:00
Thomas Harte	10a5581aea	Made first attempt at offering some sort of pictographic of actual RAM contents.	2017-08-01 07:34:12 -04:00
Thomas Harte	3ae699964f	Ensured an actual pixel stream is supplied for pixel regions. Though it's just a long stream of white pixels for now. So visual output is unchanged.	2017-08-01 07:24:29 -04:00
Thomas Harte	9d953421d8	After a quick check, added a couple of other _delegate initialisations. I should probably find a way to template this.	2017-08-01 07:07:43 -04:00
Thomas Harte	763e3b65d1	Ensured a proper initial value for delegate_.	2017-07-31 22:46:06 -04:00