Thomas Harte
|
6ec4e4e3d7
|
Merge branch 'master' into Memptr
|
2017-07-25 23:01:34 -04:00 |
|
Thomas Harte
|
279c369a1f
|
Switched to Cycles as the result from the 6502 perform_bus_operation, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation.
|
2017-07-25 22:21:09 -04:00 |
|
Thomas Harte
|
75d67ee770
|
Relocated ClockReceiver.hpp as it's a dependency for parts of the static analyser, and therefore needs to be distinct from the actual emulation parts.
|
2017-07-25 20:20:55 -04:00 |
|
Thomas Harte
|
1ba3f262a2
|
Sketched out a template for clock-receiving components to allow them to be implemented in terms of either half or whole cycles.
|
2017-07-22 21:46:50 -04:00 |
|
Thomas Harte
|
660f0e4c40
|
Added Objective-C through wiring and a Swift test class for Memptr modifications. So far with a single test, that fails.
|
2017-07-21 22:52:25 -04:00 |
|
Thomas Harte
|
2a7fc86b15
|
Enabled stricter warnings.
|
2017-07-21 20:44:35 -04:00 |
|
Thomas Harte
|
8f72fc4a44
|
Factored out from the UEF implementation the concept of being a tape that has a queue of pending pulses and manages that queue.
|
2017-07-16 22:04:40 -04:00 |
|
Thomas Harte
|
238348c885
|
Performed the initial wiring to announce that this application supports TZX files and to route them to the ZX80/81 static analyser. The TZX class itself does not yet do much beyond basic validation. I think it'll be easiest if it follows in UEF's footsteps in queuing up pulses ahead of time, so some factoring out is now required.
|
2017-07-16 21:33:11 -04:00 |
|
Thomas Harte
|
368bff1a82
|
Added a shell class that will one day be able to parse CSW files, plus the logic and metadata to instantiate it when a CSW presents itself.
|
2017-07-10 21:43:58 -04:00 |
|
Thomas Harte
|
3e5c209039
|
Added basic Typer support for the ZX80 and '81.
|
2017-07-09 22:00:34 -04:00 |
|
Thomas Harte
|
28412150e6
|
Added controls for controlling the tape motor of the ZX80/81, assuming I can find an automatic option.
|
2017-07-08 17:59:33 -04:00 |
|
Thomas Harte
|
cb105fdeb4
|
Took a first stab at high-res support.
|
2017-06-22 22:48:17 -04:00 |
|
Thomas Harte
|
aec4fd066b
|
I think I've definitively decided against this model of timing.
|
2017-06-22 21:32:14 -04:00 |
|
Thomas Harte
|
ac37424878
|
Set up a test class to allow me to discover which of the machine cycle sequences I'm in error on.
|
2017-06-15 19:06:59 -04:00 |
|
Thomas Harte
|
77aa3c187e
|
Rebranded ZX80O as ZX80O81P, with an eye to making it accept ZX81 .p files. Adjusted the initial selection part of the static analyser appropriately.
|
2017-06-11 21:38:32 -04:00 |
|
Thomas Harte
|
7e10c7f9d8
|
Relocated the ZX80/81 concept of a 'file' out from Tape into Data, given that it's an exact duplicate of memory.
|
2017-06-08 19:09:51 -04:00 |
|
Thomas Harte
|
60300851ea
|
Started sketching out a tape parser for ZX80 and '81 files. I think this'll help me to verify whether the .O input is working.
|
2017-06-07 10:12:13 -04:00 |
|
Thomas Harte
|
8c66e1d99d
|
Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data.
|
2017-06-06 17:53:23 -04:00 |
|
Thomas Harte
|
b0a7c58287
|
Fixed project to point to the XIB I actually want to keep; fixed that XIB to have the correct contents.
|
2017-06-04 17:57:37 -04:00 |
|
Thomas Harte
|
d2637123c4
|
Added necessary support to get as far as an empty window when attempting to load a piece of ZX80 software.
|
2017-06-04 17:55:19 -04:00 |
|
Thomas Harte
|
02b7c3d1b0
|
Added the necessary wiring to get into a ZX80/81-oriented part of the static analyser, which could in principle post a ZX80 target.
|
2017-06-04 17:04:06 -04:00 |
|
Thomas Harte
|
8c1769f157
|
Made a quick attempt at serialising from ZX80 .O to waves.
|
2017-06-04 16:59:26 -04:00 |
|
Thomas Harte
|
655809517c
|
Ensured that there is a subclass of file that is entrusted to load .O/.80 files, and that the code routes such files to it, noting that it should consider whether a ZX80 is required.
|
2017-06-04 16:37:03 -04:00 |
|
Thomas Harte
|
fd6623b5a5
|
Attempted to bring a common hierarchy to the Z80 and 6502 test machines, particularly with a view to eliminating the special-case Jam stuff on the 6502.
|
2017-06-03 21:22:16 -04:00 |
|
Thomas Harte
|
b304c3a4b9
|
Eliminated the 6502's reliance on the micro-op scheduler.
|
2017-06-03 20:30:07 -04:00 |
|
Thomas Harte
|
3e9212aaff
|
Plumbed through to allow interrupt tests, wrote an NMI test, corrected the error revealed.
|
2017-06-03 17:41:45 -04:00 |
|
Thomas Harte
|
7bddd294c9
|
Resolved an unpredictable conditional and temporarily disabled the Zexalltest as part of the default suite, since it takes so long to run.
|
2017-05-30 21:03:02 -04:00 |
|
Thomas Harte
|
244b5ba3c2
|
Added a proper termination condition for Zexall and, for now, a Mhz counter.
|
2017-05-30 18:32:38 -04:00 |
|
Thomas Harte
|
c6185baa99
|
Fixed R incrementation and attempted to make the status flags cheaper to write to.
|
2017-05-29 22:23:19 -04:00 |
|
Thomas Harte
|
4d4695032c
|
Discovered that Zexall is just really slow. Disabled the address sanitiser, and started working towards a verifiable end.
|
2017-05-29 21:46:00 -04:00 |
|
Thomas Harte
|
3c6f63abcc
|
Started towards running the FUSE tests. Just need to deal with the memory segments.
|
2017-05-25 19:12:59 -04:00 |
|
Thomas Harte
|
e3e461d7cb
|
Added a test class for running the FUSE tests. With nothing much in it.
|
2017-05-21 22:49:24 -04:00 |
|
Thomas Harte
|
01a064dd63
|
Added an empty ED page.
|
2017-05-20 17:29:30 -04:00 |
|
Thomas Harte
|
11d05fb3b8
|
Expanded a little on operations, added an implementation or two.
|
2017-05-19 19:18:35 -04:00 |
|
Thomas Harte
|
58efca835f
|
Sought to add a further opcode.
|
2017-05-18 22:53:43 -04:00 |
|
Thomas Harte
|
87a021ec2d
|
Made further attempt to get as fas as having the Z80 attempt to do something.
|
2017-05-16 22:19:40 -04:00 |
|
Thomas Harte
|
189317b80c
|
Added enough of a Z80 test machine to bridge up into Swift.
|
2017-05-16 22:05:42 -04:00 |
|
Thomas Harte
|
7190f927b7
|
Factored out the stuff that both all-RAM processors would share, rather than duplicating it.
|
2017-05-16 21:28:17 -04:00 |
|
Thomas Harte
|
d559d8b901
|
Continued edging towards getting the absolute basics of a testable Z80, for test-driven development. Corrected old-fashioned instance naming issues with the corresponding 6502 class and removed an unnecessary source file while at it.
|
2017-05-16 21:19:17 -04:00 |
|
Thomas Harte
|
df80c37adb
|
Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.
|
2017-05-15 08:18:57 -04:00 |
|
Thomas Harte
|
0808e9b6fb
|
Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
|
2017-05-14 22:08:15 -04:00 |
|
Thomas Harte
|
b81a2cc273
|
First tentative steps towards adding a Z80 implementation.
|
2017-05-14 17:46:41 -04:00 |
|
Thomas Harte
|
e01f3f06c8
|
Completed curly bracket movement.
|
2017-03-26 14:34:47 -04:00 |
|
Thomas Harte
|
031a68000a
|
Added a class to contain the Pitfall 2 pager and a skeleton of initial work.
|
2017-03-18 22:08:47 -04:00 |
|
Thomas Harte
|
c3d82f88a5
|
Tidied up and commented on the Activision stack implementation.
|
2017-03-18 21:01:58 -04:00 |
|
Thomas Harte
|
c033bad0b9
|
Here's MNetwork!
|
2017-03-18 20:51:49 -04:00 |
|
Thomas Harte
|
c31d85f820
|
Re-emplaced the MegaBoy. Also cut detritus from the main Atari header.
|
2017-03-18 19:02:34 -04:00 |
|
Thomas Harte
|
217fbf257e
|
CBS RAM Plus returns.
|
2017-03-18 18:56:20 -04:00 |
|
Thomas Harte
|
0b611a14b9
|
Tigervision paging returns.
|
2017-03-18 18:50:13 -04:00 |
|
Thomas Harte
|
df6861c9dc
|
Parker Bros paging is back.
|
2017-03-18 18:21:01 -04:00 |
|