97 Commits

Author	SHA1	Message	Date
Thomas Harte	72a645ec1e	Fix trans; take further crack at MEMC permissions.	2024-03-25 15:50:59 -04:00
Thomas Harte	1154ffd072	Add a 'drive in use' indicator LED.	2024-03-25 15:03:54 -04:00
Thomas Harte	8ba9708942	Hopefully resolve the mystery of the latch writes.	2024-03-25 14:54:30 -04:00
Thomas Harte	521fca6089	Expose full bus to IOC dependents; add notes.	2024-03-25 11:07:44 -04:00
Thomas Harte	ae684edbe1	Formally decode bank/offset/type.	2024-03-25 10:16:36 -04:00
Thomas Harte	fa0a9aa611	Eliminate 'has_moved_rom_'.	2024-03-24 22:36:11 -04:00
Thomas Harte	5da9e0486a	Simplify control flow.	2024-03-24 22:30:26 -04:00
Thomas Harte	6980fd760c	Add further heavily-manual debugging aids.	2024-03-24 22:18:30 -04:00
Thomas Harte	c1602cc8fe	The keyboard and interrupts are currently trusted.	2024-03-23 21:49:52 -04:00
Thomas Harte	189dd176de	Reguess state machine, fixing startup display.	2024-03-23 21:38:35 -04:00
Thomas Harte	3cf262d1f7	Improve terminology, add more documentation.	2024-03-23 21:12:01 -04:00
Thomas Harte	ccfc389274	Quieten where now confident.	2024-03-23 21:03:06 -04:00
Thomas Harte	0e07f802ac	Use BACK state; accept other ACKs at any time.	2024-03-23 21:02:35 -04:00
Thomas Harte	c720f3910a	Avoid implicit sign cast.	2024-03-23 20:13:25 -04:00
Thomas Harte	4215edd11b	Reduce noise.	2024-03-23 20:12:56 -04:00
Thomas Harte	09a61cf1a7	Don't expect an ACK after identifying.	2024-03-23 20:12:38 -04:00
Thomas Harte	5967ad0865	Sketch out whole protocol, albeit faulty.	2024-03-23 17:08:03 -04:00
Thomas Harte	eb34c38332	Add very faulty key input.	2024-03-23 15:58:48 -04:00
Thomas Harte	5ccb18225a	Provide key states to the keyboard.	2024-03-23 15:43:04 -04:00
Thomas Harte	58bbce1a15	Avoid display errors upon back-pressure.	2024-03-22 22:01:12 -04:00
Thomas Harte	9ea3e547ee	Fix IRQ/FIQ return addresses.	2024-03-22 21:42:34 -04:00
Thomas Harte	fb5fdc9f10	Actually apply video divider.	2024-03-22 10:24:24 -04:00
Thomas Harte	de7b7818f4	Add 4bpp output.	2024-03-22 10:18:25 -04:00
Thomas Harte	c4e6b18294	Manage pixel buffers.	2024-03-22 10:10:13 -04:00
Thomas Harte	ae6cf69449	Move responsibility for clock division; reinstate vsync interrupt.	2024-03-22 10:01:34 -04:00
Thomas Harte	4a2dcff028	Endeavour to map colours properly.	2024-03-21 21:53:50 -04:00
Thomas Harte	aa6acec8fa	Don't hoard cycles per line value.	2024-03-21 21:47:27 -04:00
Thomas Harte	4ac4da908c	Reduce TODOs, do _something_ with border colour.	2024-03-21 21:40:11 -04:00
Thomas Harte	66e62857c4	Give ostensibly clean timing to the CRT.	2024-03-21 21:29:53 -04:00
Thomas Harte	bbc0d8b050	Count time in phase correctly.	2024-03-21 21:15:25 -04:00
Thomas Harte	0f8bc416d1	Make first, faulty step into displaying a field.	2024-03-21 21:10:55 -04:00
Thomas Harte	2ec235170e	Finish the thought on magic constants.	2024-03-21 20:45:17 -04:00
Thomas Harte	2de1a2dd0d	Install and properly clock a CRT.	2024-03-21 20:41:24 -04:00
Thomas Harte	1f49c3b113	Give sound and video somewhere to read from.	2024-03-21 20:22:20 -04:00
Thomas Harte	5c645fb3c2	Switch to a fixed output clock; retain addresses.	2024-03-21 11:51:29 -04:00
Thomas Harte	40b5227f0b	Deliver all addresses to the video outputter.	2024-03-21 11:24:47 -04:00
Thomas Harte	847dba8f07	Divide input pixel rate.	2024-03-21 11:03:28 -04:00
Thomas Harte	417c6c4629	Announce changes.	2024-03-21 10:51:52 -04:00
Thomas Harte	2d6a4d490e	Add dummy retrace interrupt.	2024-03-21 10:02:56 -04:00
Thomas Harte	a6ec870872	Capture more audio detail.	2024-03-21 09:47:53 -04:00
Thomas Harte	389541be6d	Pipe further sound parameters; obey divider.	2024-03-20 14:43:47 -04:00
Thomas Harte	208f3e24de	Audio ticks are now included.	2024-03-20 14:30:21 -04:00
Thomas Harte	1341816791	Break apart, switching to delegates for interrupts.	2024-03-20 14:26:56 -04:00
Thomas Harte	08673ff021	Switch to macro blocks of execution; flail around audio.	2024-03-20 11:42:37 -04:00
Thomas Harte	3a2d9c6082	Give user access to ROM; clean up a touch.	2024-03-19 20:26:17 -04:00
Thomas Harte	43a3959b8f	Don't data abort on missing low ROM.	2024-03-19 15:06:01 -04:00
Thomas Harte	85a738acff	Get rigorous on exception addresses.	2024-03-19 15:03:31 -04:00
Thomas Harte	2ad6bb099b	Begin foray into disassembly.	2024-03-19 11:34:10 -04:00
Thomas Harte	9d858bc61b	IRQ and FIQ should also store PC+4.	2024-03-18 14:08:08 -04:00
Thomas Harte	612c9ce49a	Transfer logging responsibility.	2024-03-18 11:09:29 -04:00