Thomas Harte
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7e04d00cc1
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Fixed key values, causing the new set of keys to work, decreased quantity of output and ensured that pixels appear in modes 0 and 2.
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2017-08-01 20:39:10 -04:00 |
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Thomas Harte
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eca9586a0f
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Fixed: input value is no longer overwritten by 0xff. The '0' key now works.
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2017-08-01 20:19:02 -04:00 |
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Thomas Harte
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2e4577f741
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Made a game attempt at implementing a (sticky) keyboard. No effect yet.
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2017-08-01 17:52:05 -04:00 |
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Thomas Harte
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f5b278d683
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Added enough stuff to put the emulated Amstrad CPC in a state of knowing whether its '0' key is pressed.
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2017-08-01 17:31:56 -04:00 |
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Thomas Harte
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e6854ff8db
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Corrected typo: the input to an AY is BDIR, not BCDIR.
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2017-08-01 17:06:57 -04:00 |
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Thomas Harte
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3b292273c7
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Fixed: BC2 is always implicitly set. The machine is now periodically checking the AY's register 14 (i.e. the first input port), so probably there's enough here now to implement keyboard input.
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2017-08-01 17:05:11 -04:00 |
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Thomas Harte
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cb732e5d5f
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Made an attempt to wire in an [unclocked] AY, in an endeavour to get to keyboard reading.
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2017-08-01 17:01:58 -04:00 |
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Thomas Harte
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08ad35efd9
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It's barely an implementation of the 8255, but ensured that data is bounced into the PortHandler, conveniently assuming the interaction mode used by the CPC.
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2017-08-01 16:34:13 -04:00 |
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Thomas Harte
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58b98267fc
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Formally transferred ownership of PIO accesses to an incoming template, and decided to start being explicit about how to specify the interfaces and provide fallbacks for optional behaviour for the new, clean generation of interfaces. A full-project sweep will inevitably occur but I'll try to tie off this branch first.
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2017-08-01 16:15:19 -04:00 |
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Thomas Harte
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a27946102a
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Took a shot at the interrupt counter. Attempts at keyboard reading now recur so it'll probably do for now. I think that next puts me into the realm of needing to implement the 8255.
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2017-08-01 15:49:16 -04:00 |
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Thomas Harte
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6ac7132799
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Had a quick go at properly outputting Mode 1, adding wiring to communicate palette and mode changes to the CRTC bus handler. Colours are off but it's sufficient for now.
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2017-08-01 15:16:13 -04:00 |
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Thomas Harte
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ca42abab70
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Doubled up to ensure that every byte that should be inspected is represented. This makes it clearer that I'm on the right road. A garbled version of 'Amstrad 64k Microcomputer' can be discerned, in a weird grayscale and with the right-hand column missing and skewed output as a result.
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2017-08-01 07:56:44 -04:00 |
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Thomas Harte
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933d69a256
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Fixed slightly: the CPC wiki has a typo. It's 12 and 13 that move up to 14 and 15.
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2017-08-01 07:51:13 -04:00 |
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Thomas Harte
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10a5581aea
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Made first attempt at offering some sort of pictographic of actual RAM contents.
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2017-08-01 07:34:12 -04:00 |
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Thomas Harte
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3ae699964f
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Ensured an actual pixel stream is supplied for pixel regions. Though it's just a long stream of white pixels for now. So visual output is unchanged.
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2017-08-01 07:24:29 -04:00 |
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Thomas Harte
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42dd27c9b1
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Shunted method bodies inline, given that there's no need for a declaration/definition distinction.
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2017-07-31 22:39:25 -04:00 |
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Thomas Harte
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3df13cddd4
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As per my keenness for cleanliness improvements corresponding to my ever-increasing C++ ability: turned the Amstrad into something that a factory produces, allowing me completely to hide a bunch of implementation details.
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2017-07-31 22:32:04 -04:00 |
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Thomas Harte
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c2253c1e0f
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Fixed multiplier: the dot clock I've used to instantiate the CRT is the pixel clock, not the character clock.
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2017-07-31 22:17:46 -04:00 |
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Thomas Harte
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f742fd5d4a
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Made basic attempt to get something on screen: white where the display is enabled, black for the border.
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2017-07-31 22:13:20 -04:00 |
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Thomas Harte
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69b99fe127
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Transferred ownership of the CRT to the CRTC bus handler, to give it easy access.
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2017-07-31 22:04:52 -04:00 |
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Thomas Harte
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e28829bd1b
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Corrected CRTC timing, gave it someone to talk to and a means with which to talk.
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2017-07-31 20:14:46 -04:00 |
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Thomas Harte
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68ceeab610
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Created a 6845 class and started pushing data at it and clocking it. It doesn't currently have the concept of a bus but will do, hence the in-header implementation.
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2017-07-31 19:56:59 -04:00 |
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Thomas Harte
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68dca9d047
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Made a first attempt at ROM paging, with pretty much the same scheme that'll be needed for 128kb support.
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2017-07-31 19:37:28 -04:00 |
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Thomas Harte
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d88ca151f4
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Added a first attempt at output port decoding. Just logging for now.
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2017-07-31 19:25:10 -04:00 |
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Thomas Harte
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3c90218c3d
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With a very basic stab at something a bit like the memory map (sans paging), execution begins.
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2017-07-31 19:15:43 -04:00 |
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Thomas Harte
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afd409c883
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Ensured that ROM images are loaded and passed to the Amstrad CPC.
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2017-07-31 18:44:49 -04:00 |
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Thomas Harte
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9c04d851e4
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Added the basics necessary to get the CPU ticking over, at a nominal 4Mhz but with the wait states that I currently believe to be accurate.
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2017-07-31 07:29:50 -04:00 |
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Thomas Harte
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1d6fe11906
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Added an instance of Outputs::CRT::CRT. So progress is now: select CDT, up comes a blank window.
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2017-07-31 07:16:51 -04:00 |
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Thomas Harte
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c0f1313830
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Performed sufficient wiring to get to the point where attempting to load a CDT creates an instance of the Amstrad CPC and then fails only because the thing vends a nullptr CRT.
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2017-07-30 22:05:29 -04:00 |
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