Thomas Harte
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6b602c74b7
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Made an attempt to support memory maps other than the unexpanded default of 1kb.
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2017-06-11 19:29:02 -04:00 |
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Thomas Harte
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e40d553045
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Bumped the tape parser up into the machine to ensure a maintained state. Temporarily disabled normally-timed tape playback.
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2017-06-11 18:31:43 -04:00 |
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Thomas Harte
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e5b30cdfbb
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Attempted to ensure appropriate resumption of processing after quick-reading a tape byte.
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2017-06-11 17:28:47 -04:00 |
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Thomas Harte
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ba5f34f827
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Narrowed view to the centre 80% of a frame.
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2017-06-11 17:24:32 -04:00 |
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Thomas Harte
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84d2feb2e6
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Cleaned up and implemented fast-tape hack. I've decided it'd be better to test some other software, potentially to give multiple issues to think about, rather than sitting around with just the one.
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2017-06-11 16:42:49 -04:00 |
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Thomas Harte
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d910a4fd38
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Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207.
Also: lots of printfs have grown temporarily as I try to figure out what I'm doing so wrong as to break loading.
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2017-06-11 13:32:20 -04:00 |
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Thomas Harte
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5626d35bc4
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Tried flipping the bit meaning; decided at least to leave it in full-byte form.
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2017-06-06 18:38:05 -04:00 |
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Thomas Harte
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63e0802f4e
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Ensured tape input appears on the returned value.
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2017-06-06 18:16:27 -04:00 |
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Thomas Harte
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e3ee9604a5
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Added comments.
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2017-06-06 18:01:33 -04:00 |
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Thomas Harte
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8c66e1d99d
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Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data.
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2017-06-06 17:53:23 -04:00 |
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Thomas Harte
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ca9e8aecd6
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Made a seemingly unsuccessful attempt to add tape input.
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2017-06-06 10:13:32 -04:00 |
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Thomas Harte
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cc4cb45e9d
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Implemented keyboard input and ensured that the signal generated is marked as composite, putting the colour-suppression ball into the CRT's court.
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2017-06-06 09:25:18 -04:00 |
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Thomas Harte
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ebbf6e6133
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Surprisingly, I think this may actually be the correct output: stopped throwing away the I part of the refresh register and flipped black and white.
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2017-06-06 09:03:09 -04:00 |
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Thomas Harte
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cba07dec7e
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Doubled up to display all eight pixels. To confirm that they are the wrong pixels.
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2017-06-06 08:59:00 -04:00 |
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Thomas Harte
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6f7037b2b1
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Made an initial stab at outputting half the correct pixels.
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2017-06-06 08:55:07 -04:00 |
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Thomas Harte
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ef4b2f963d
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Probably more-or-less corrected. But this is all a bit too interdependent.
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2017-06-05 23:52:56 -04:00 |
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Thomas Harte
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97f3ff03b6
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Restored white background and attempted to correct output timing deficiencies. Incomplete success.
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2017-06-05 23:50:04 -04:00 |
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Thomas Harte
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2fbc7a2869
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Made a very basic attempt at getting something that at least demarcates proper graphics output.
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2017-06-05 23:32:49 -04:00 |
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Thomas Harte
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4983718df7
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Got to outputting something to the CRT. Should be just proper syncs and a paper background. It's not synchronising properly, so something is amiss in my timing.
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2017-06-05 10:47:42 -04:00 |
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Thomas Harte
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23ca00fd9a
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Added memory fuzzing as a way to verify state being written by the Z80. Eventually discovered the HALT problem as fixed in the last commit, so have stripped away the caveman stuff again.
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2017-06-05 10:36:07 -04:00 |
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Thomas Harte
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893f61b490
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Attempted specifically to reproduce the 1kb ZX80 memory map in the hope of getting compact lines and in case mirroring is why I'm getting completely empty video reads. Still no action.
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2017-06-05 09:38:49 -04:00 |
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Thomas Harte
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7e3a46c33e
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[Re]discovered that sync may also be a product of the interrupt cycle. So started looking into that.
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2017-06-04 21:54:55 -04:00 |
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Thomas Harte
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73654d51dd
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Wired up actually to run.
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2017-06-04 18:37:13 -04:00 |
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Thomas Harte
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096551ab3e
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Made a first attempt to hash out the ZX80's bus. Video output isn't yet going though. Can't seem to find clarity on whether horizontal sync is really programmatic. Let's see.
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2017-06-04 18:32:23 -04:00 |
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Thomas Harte
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c485c460f7
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Imported the ZX80 and 81 system ROMs (though not publicly), added enough code to post their contents into C++ world.
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2017-06-04 18:08:35 -04:00 |
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Thomas Harte
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d2637123c4
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Added necessary support to get as far as an empty window when attempting to load a piece of ZX80 software.
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2017-06-04 17:55:19 -04:00 |
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Thomas Harte
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2562306802
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Merge branch 'master' into Z80
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2017-05-16 21:05:00 -04:00 |
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Thomas Harte
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2ee8a7056e
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Corrected TIA no longer to assume phase is an automatic quarter askew.
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2017-05-16 20:43:28 -04:00 |
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Thomas Harte
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a5075d9eb5
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Formalised the reasoning behind the colour phase fix-up and made it an opt-in per-caller value. Only the Oric currently needs to opt in.
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2017-05-16 20:31:39 -04:00 |
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Thomas Harte
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eb8a2de5d6
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Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.
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2017-05-15 07:38:59 -04:00 |
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Thomas Harte
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0808e9b6fb
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Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
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2017-05-14 22:08:15 -04:00 |
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Thomas Harte
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8e35e913bb
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Formally withdrew the 'load automatically' option for the Vic, having removed that option elsewhere.
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2017-05-14 16:59:24 -04:00 |
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Thomas Harte
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5d91a2600d
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Permitted ROM-style PRGs that are not a power-of-two in size, and added extra safety checks on loading data from a tape.
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2017-05-08 22:15:35 -04:00 |
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Thomas Harte
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cb66c7e2dc
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Performed some minor tidying.
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2017-05-08 21:05:35 -04:00 |
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Thomas Harte
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61f8f2f18c
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Switched to a more straightforward way of exiting from tape data loading.
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2017-05-08 20:58:55 -04:00 |
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Thomas Harte
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7b43ae0a92
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Implemented a catch for loading the data portion of files.
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2017-05-07 22:22:59 -04:00 |
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Thomas Harte
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2807e3134f
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Implemented speedy header finding. So that's half of it.
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2017-05-07 20:32:48 -04:00 |
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Thomas Harte
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0771363f3b
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Removed one piece of unnecessary logging.
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2017-05-06 22:22:03 -04:00 |
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Thomas Harte
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2edf73908c
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Temporarily disabled the existing fast loading implementation in pursuit of another, and started trying to correct the lack of connection between the userport VIA and the tape drive.
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2017-05-06 22:00:12 -04:00 |
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Thomas Harte
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ed6b135015
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Made final switch to permit high-sampling rate Atari audio.
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2017-04-15 21:18:00 -04:00 |
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Thomas Harte
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f95015c7f6
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Pulled out the divisor for audio.
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2017-04-03 21:16:39 -04:00 |
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Thomas Harte
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814c0ada13
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Fixed action counts for border motion.
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2017-03-26 18:33:05 -04:00 |
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Thomas Harte
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dfc468f220
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Locked down all initial state.
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2017-03-26 15:47:04 -04:00 |
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Thomas Harte
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e01f3f06c8
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Completed curly bracket movement.
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2017-03-26 14:34:47 -04:00 |
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Thomas Harte
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3229502fa1
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Standardised curly bracket placement across the Atari.
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2017-03-23 21:59:16 -04:00 |
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Thomas Harte
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a26b87f348
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Fixed: mistake was failure to count ready cycles.
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2017-03-20 20:44:03 -04:00 |
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Thomas Harte
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4c3cc42c91
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This gives a very noisy version of the real audio.
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2017-03-20 20:38:29 -04:00 |
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Thomas Harte
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f3f4e1a541
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Made a first, hacky, attempt at audio.
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2017-03-20 19:35:51 -04:00 |
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Thomas Harte
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4722f6b5c4
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Fixed sprite disappearance: test should be applied predecrement, not post — it relates to the address being used this access, not the next one.
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2017-03-19 18:58:35 -04:00 |
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Thomas Harte
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7d8d1c7828
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Fixed 'random' number generator.
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2017-03-19 18:54:35 -04:00 |
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Thomas Harte
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4bb70e7d31
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Resetting the mask upon low byte write appears to resolve some issues.
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2017-03-19 18:49:37 -04:00 |
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Thomas Harte
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321030bb44
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Added a slightly faulty but seemingly 'close' version of masking.
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2017-03-19 18:28:06 -04:00 |
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Thomas Harte
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6c161b1150
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This gives something that might be the correct background.
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2017-03-19 17:49:48 -04:00 |
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Thomas Harte
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d5c37c8619
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Shushed a little, so as to be able to see a reasonable amount of output during my lifetime.
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2017-03-19 17:38:54 -04:00 |
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Thomas Harte
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7c66c36d3f
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Attempted at least to manage appropriate data storage.
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2017-03-19 17:31:08 -04:00 |
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Thomas Harte
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031a68000a
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Added a class to contain the Pitfall 2 pager and a skeleton of initial work.
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2017-03-18 22:08:47 -04:00 |
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Thomas Harte
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c3d82f88a5
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Tidied up and commented on the Activision stack implementation.
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2017-03-18 21:01:58 -04:00 |
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Thomas Harte
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c033bad0b9
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Here's MNetwork!
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2017-03-18 20:51:49 -04:00 |
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Thomas Harte
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c31d85f820
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Re-emplaced the MegaBoy. Also cut detritus from the main Atari header.
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2017-03-18 19:02:34 -04:00 |
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Thomas Harte
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217fbf257e
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CBS RAM Plus returns.
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2017-03-18 18:56:20 -04:00 |
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Thomas Harte
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0b611a14b9
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Tigervision paging returns.
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2017-03-18 18:50:13 -04:00 |
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Thomas Harte
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df6861c9dc
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Parker Bros paging is back.
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2017-03-18 18:21:01 -04:00 |
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Thomas Harte
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a4cd12394e
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Reinstated the Activision stack pager.
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2017-03-18 18:03:48 -04:00 |
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Thomas Harte
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e0bca1e37b
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Reinstated the 16 and 32 kb Atari pagers, and ensured the 6532 always starts in a valid state.
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2017-03-18 17:34:34 -04:00 |
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Thomas Harte
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55ce851bb2
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Fixed types of the 8k cartridges, ensured the 6502 starts without an IRQ request history.
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2017-03-18 17:04:01 -04:00 |
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Thomas Harte
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e8d34f2eb4
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Having farmed out the bus, the Atari itself no longer is/owns a 6502.
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2017-03-18 16:34:41 -04:00 |
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Thomas Harte
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bb3daaa99b
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Sought to reintroduce the Atari 8k paging scheme, at the same time deciding to do away with the copy and paste of holding on to ROM data.
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2017-03-18 15:04:01 -04:00 |
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Thomas Harte
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36b58d03b7
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Formalised read bus value guarantee from the 6502, fixed missing clock signal wiring on the Atari cartridge class, reintroduced CommaVid support.
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2017-03-18 14:46:46 -04:00 |
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Thomas Harte
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7958459db9
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In theory unpaged cartridges should now work. Time to debug.
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2017-03-18 14:01:04 -04:00 |
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Thomas Harte
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14a76af0d3
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Started trying to float out bus control to cartridges.
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2017-03-17 20:28:07 -04:00 |
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Thomas Harte
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afbd9fd41b
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Fixed declared line length.
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2017-03-14 21:33:38 -04:00 |
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Thomas Harte
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7302703039
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Implemented the Activision stack paging scheme.
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2017-03-14 20:24:05 -04:00 |
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Thomas Harte
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97a8a96593
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Rejigged how the memory map is handled and implemented MNetwork support.
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2017-03-14 20:07:54 -04:00 |
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Thomas Harte
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3b29276228
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Implemented the MegaBoy paging scheme.
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2017-03-14 17:40:01 -04:00 |
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Thomas Harte
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b3632a4e86
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Institutes CBS RAM Plus emulation.
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2017-03-14 17:25:10 -04:00 |
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Thomas Harte
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f0d944847b
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Fixed setting of the second 1kb.
|
2017-03-11 18:16:29 -05:00 |
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Thomas Harte
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add14fb43a
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Made an attempt to implement Tigervision paging.
|
2017-03-11 17:44:35 -05:00 |
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Thomas Harte
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33bda2d40c
|
Switched to image inspection for RAM guesses rather than disassembly. Which fixes the other Parker Bros titles.
|
2017-03-11 13:04:23 -05:00 |
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Thomas Harte
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2b5e3a600e
|
Made a first attempt at implementing the Parker Bros pager within the emulation.
|
2017-03-11 12:43:12 -05:00 |
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Thomas Harte
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9c72ce5bd2
|
Ensured a settling delay is permitted before an NTSC/PAL decision is made. To avoid false switches just due to startup.
|
2017-03-06 19:37:35 -05:00 |
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Thomas Harte
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79784a8e57
|
Followed tip: missiles are locked to the position after four output pixels, not four input pixels.
|
2017-03-04 22:23:50 -05:00 |
|
Thomas Harte
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4751615623
|
Fixed NTSC colour cycle count, and hence the 2600's reported line lengths and phase offset.
|
2017-03-04 17:31:39 -05:00 |
|
Thomas Harte
|
d3257c345a
|
Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.
|
2017-03-04 17:00:28 -05:00 |
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Thomas Harte
|
837cccdf83
|
Switched to deferred updates for the 6532.
|
2017-03-04 14:58:28 -05:00 |
|
Thomas Harte
|
93d1573481
|
Added a fix for certain homebrews.
|
2017-03-01 07:59:25 -05:00 |
|
Thomas Harte
|
893a5dd007
|
Added an artificial low pass filter, attempting to capture post-digital effects.
|
2017-02-28 21:29:55 -05:00 |
|
Thomas Harte
|
06dd98b23c
|
Pulled the reset time for horizontal blank extend up to position 224.
|
2017-02-28 20:28:54 -05:00 |
|
Thomas Harte
|
184c8ae707
|
Extended to emulate the CommaVid.
|
2017-02-27 20:50:59 -05:00 |
|
Thomas Harte
|
9d7985c1e1
|
Added Super Chip emulation.
|
2017-02-26 17:47:29 -05:00 |
|
Thomas Harte
|
e6a84fd26b
|
Attempted a hardware-correct implementation of missile-to-player latching. This completes the last of the **knowing** inaccuracies. The rest are as-of-yet unwitting.
|
2017-02-26 15:12:31 -05:00 |
|
Thomas Harte
|
440467ea3e
|
Started communicating which copy is being requested.
|
2017-02-26 13:39:25 -05:00 |
|
Thomas Harte
|
98376de9ad
|
Started returning 'no effect' for pot ports, rather than doing nothing. Still very much TODO though.
|
2017-02-25 22:58:58 -05:00 |
|
Thomas Harte
|
e61e355251
|
Moved to the maximum possibly required queue length of 4. Though the emulated 2600 should never need more than 2 slots as per the current calling pattern, it's not a contractual guarantee.
|
2017-02-25 17:25:10 -05:00 |
|
Thomas Harte
|
c898c8a99e
|
Ensured the missiles and ball don't attempt to enqueue. Because I don't think they're supposed to.
|
2017-02-25 17:13:22 -05:00 |
|
Thomas Harte
|
8c9062857c
|
Added a single-slot queue for player objects to defer drawing, thereby deferring pixel lookup. Which I think is correct. Though more slots might be needed.
|
2017-02-25 17:10:24 -05:00 |
|
Thomas Harte
|
77ed4ddc05
|
Slightly simplified ready line release logic.
|
2017-02-23 21:08:32 -05:00 |
|
Thomas Harte
|
82f392fada
|
This should be the other way around. I want whichever is later.
|
2017-02-22 21:54:49 -05:00 |
|
Thomas Harte
|
8291a63d5f
|
Fixed loss of audio when switching to PAL.
|
2017-02-22 21:15:37 -05:00 |
|
Thomas Harte
|
6120dae61a
|
While I'm using the hacky approach to player/missile synchronisation, I need to seed adder.
|
2017-02-22 07:39:11 -05:00 |
|
Thomas Harte
|
4f5f191cd6
|
Fixed: will no longer attempt to output pixels from before the pixel part of a line on which sync was disabled abruptly.
|
2017-02-22 07:33:36 -05:00 |
|