Thomas Harte
44252984c2
Eliminate INT3 special case.
2022-03-11 14:03:46 -05:00
Thomas Harte
f694620087
Resolve TODO.
2022-03-11 13:10:44 -05:00
Thomas Harte
9b4048ec6e
The address size modifier doesn't seem to affect far address sizes.
...
It's meant to affect only instructions with operands that reside in memory, I think. So probably only ::DirectAddress in my nomenclature. More research to do.
2022-03-11 12:46:07 -05:00
Thomas Harte
91d75d7704
Switch strategy on 8086 instruction lengths.
2022-03-11 09:48:26 -05:00
Thomas Harte
f92ffddb82
Add instruction length limits.
2022-03-10 20:47:56 -05:00
Thomas Harte
bf7faa80c1
Add TODO.
2022-03-10 16:47:54 -05:00
Thomas Harte
a2ae3771eb
Add test for switch to Source::IndirectNoBase.
2022-03-10 15:45:56 -05:00
Thomas Harte
673ffc50da
Switch to intended compact version of Instruction.
2022-03-10 15:14:50 -05:00
Thomas Harte
6dc9973754
Incorporate length into Instruction.
2022-03-10 07:12:12 -05:00
Thomas Harte
bbf925a27e
Clarify, unify and correct decoding and encoding of [CALL/RET/JMP][near/far/relative/absolute].
2022-03-09 16:48:06 -05:00
Thomas Harte
acd9df6745
Fix segment/offset sizes for far calls.
2022-03-09 15:23:43 -05:00
Thomas Harte
f96c051932
Record PUSH immediate operation size.
2022-03-09 14:24:57 -05:00
Thomas Harte
67b2e40fae
Fixed: INs and OUTs remain single byte.
2022-03-09 10:51:16 -05:00
Thomas Harte
081a2acd61
Fix shift group operand size.
2022-03-09 09:33:25 -05:00
Thomas Harte
de79acc790
Fix RegAddr/AddrRegs and group 2 decoding.
2022-03-09 08:38:34 -05:00
Thomas Harte
926a373591
Extend SIB test, correct decoder.
2022-03-08 15:03:37 -05:00
Thomas Harte
a954f23642
Attempt 32-bit modregrm + SIB parsing.
2022-03-08 14:39:49 -05:00
Thomas Harte
41a104cc10
Adds special test/control/debug MOVs.
...
This'll do; it's not ideal but avoids bloating up the `Source` enum.
2022-03-07 17:04:05 -05:00
Thomas Harte
8e669a32a3
Take a stab at group 8.
2022-03-07 16:34:56 -05:00
Thomas Harte
7ea84d9a4e
Add MOVZX, MOVSX.
2022-03-07 16:25:44 -05:00
Thomas Harte
7313c89dec
Add BT, BTS, BTR, BTC, BSF, BSR.
2022-03-07 16:23:25 -05:00
Thomas Harte
35a66c03c2
Add the SETs.
2022-03-07 10:32:34 -05:00
Thomas Harte
bbb3168bae
Adds the missing shift group segues at c0 and c1.
2022-03-07 09:18:59 -05:00
Thomas Harte
1ea9d3faf8
Introduce additional forms of IMUL.
2022-03-07 09:05:22 -05:00
Thomas Harte
4479be4fd0
Add the two immediate PUSHes.
2022-03-06 14:28:41 -05:00
Thomas Harte
91a6bf671d
Also 'easy': LSS, LFS, LGS.
...
Though perhaps I'm off on LES and LDS?
2022-03-06 09:28:43 -05:00
Thomas Harte
49b5889d9e
0x8c is available on the 8086.
2022-03-06 09:24:59 -05:00
Thomas Harte
ede61ae130
Flag up TODOs, for easier in-editor navigation.
2022-03-05 17:48:01 -05:00
Thomas Harte
7a79111767
Add the easiest 80386 extensions: PUSH/POP FS/GS and longer conditional jumps.
2022-03-05 17:32:21 -05:00
Thomas Harte
65f578fe61
Add notes on all missing opcodes.
2022-03-05 17:16:13 -05:00
Thomas Harte
3a8eb4a4f0
Add 80386 segment overrides.
2022-03-05 17:03:46 -05:00
Thomas Harte
eb180656bb
Fix $8e data size, add $8c.
2022-03-05 17:00:48 -05:00
Thomas Harte
1afcbba218
Clarify sign extension availability.
2022-03-05 16:44:26 -05:00
Thomas Harte
8a0902a83b
Adapts existing opcodes for 32-bit parsing.
2022-03-05 13:52:07 -05:00
Thomas Harte
11bb594fa2
Sets up [ignored] memory and data size prefixes.
2022-03-02 20:23:35 -05:00
Thomas Harte
8ee62b4789
Simplify address size semantics.
...
Since it'll no longer be a mode-dependant toggle, but a fully-retained value.
2022-03-01 17:29:26 -05:00
Thomas Harte
ecb20cc29b
Improve tabbing.
2022-02-21 16:09:03 -05:00
Thomas Harte
b6183e86eb
Clarifies model tests by macro; adds the address size toggle.
2022-02-21 16:06:02 -05:00
Thomas Harte
229af0380c
This is normatively called the address size.
2022-02-21 15:52:16 -05:00
Thomas Harte
b968a662d3
Dump notes on intended Instruction layout, add memory size flag.
2022-02-21 15:48:58 -05:00
Thomas Harte
76814588b8
Template Instruction on its content size.
2022-02-21 12:36:03 -05:00
Thomas Harte
1934c7faa2
Switch Decoder into a template.
2022-02-21 12:21:57 -05:00
Thomas Harte
9e9e160c43
Eliminate Ind[BXPlusSI/etc] in favour of specifying everything via a ScaleIndexBase.
2022-02-21 11:45:46 -05:00
Thomas Harte
546b4edbf1
Ensure ScaleIndexBase can be used constexpr; add note-to-self on indexing table.
2022-02-20 19:22:28 -05:00
Thomas Harte
75d2d64e7c
Albeit that it requires nuanced shift/roll semantics, eliminates CL constant.
...
Shifts and rolls are already slightly semantically special for being undefined for values greater than 8/16/32 — i.e. in some implementations they don't even use the entirety of CL, just the low five bits. Which makes me feel a little better.
The upside of no ambiguity between eCX size 1 and CL justifies the trade.
2022-02-20 17:52:19 -05:00
Thomas Harte
a5113998e2
Accept that IN and OUT are going to have special semantics, thereby kill ::AX and ::DX.
2022-02-20 17:15:01 -05:00
Thomas Harte
4d2e8cd71d
Adds a presently-unreachable step for SIB consumption.
2022-02-19 18:00:27 -05:00
Thomas Harte
30b355fd6f
Chips away further at the legacy register names.
2022-02-18 18:37:47 -05:00
Thomas Harte
12df7112da
Starts adjusting the concept of a Source.
2022-02-17 11:32:09 -05:00
Thomas Harte
cd5ca3f65b
Attempts a full decoding of the 80286 instruction set.
2022-02-10 17:13:50 -05:00
Thomas Harte
0bd63cf00f
Introduces the easy F page instructions.
2022-02-10 09:35:05 -05:00
Thomas Harte
7ceb3369eb
Attempts decoding of the 80186 set.
2022-02-09 17:51:48 -05:00
Thomas Harte
85bfd2eba3
Remove further errant 'Awaiting's.
2022-01-31 08:22:07 -05:00
Thomas Harte
2d543590dc
Make a noun, for better consistency.
2022-01-31 08:14:33 -05:00
Thomas Harte
5f413a38df
Switches all American-style dates.
...
I'd failed to configure my new computer appropriately, it seems.
2021-01-16 22:09:19 -05:00
Thomas Harte
3c20e1f037
Adds files for the M50740 and corrects namespace errors elsewhere.
2021-01-15 21:30:30 -05:00
Thomas Harte
47d20699d8
Completes list, ensures POP acts as documented.
2021-01-15 20:48:31 -05:00
Thomas Harte
e8ce70dccb
Chips further away at documentation.
2021-01-15 18:52:59 -05:00
Thomas Harte
ddb4bb1421
Better plans project layout.
2021-01-15 18:16:01 -05:00
