Thomas Harte
4fc25fb798
Adds basic shift input.
2021-11-07 05:18:54 -08:00
Thomas Harte
941d9a46a2
Makes a better effort at exposition; better implements clocked line.
2021-11-07 05:18:40 -08:00
Thomas Harte
ecfe68d70f
Introduce the principle that a Serial::Line can be two-wire — clock + data.
2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9
Post key actions to the nominated serial line.
...
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
f102d8a4b4
Extend to allow full-[byte/word/dword] writes, in LSB or MSB order.
2021-11-06 12:01:32 -07:00
Thomas Harte
471e13efbc
Transcribes keycodes.
2021-11-04 18:54:42 -07:00
Thomas Harte
6d34432988
Starts to build in a serial line for input.
2021-11-04 18:54:28 -07:00
Thomas Harte
d3f0d15732
Merge branch 'master' into Amiga
2021-11-03 19:27:06 -07:00
Thomas Harte
b827b9e33e
Add necessary shift storage.
2021-11-03 19:26:45 -07:00
Thomas Harte
29e5ecc282
Add TODOs rather than complete stop on shift register acccesses.
2021-11-02 18:19:31 -07:00
Thomas Harte
c9bf2dda16
Attempt implementation of disk sync.
2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b
Relocate disk logic into a separate compilation unit.
2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511
Adds support for interlaced output.
2021-11-02 14:34:03 -07:00
Thomas Harte
491b9f83f2
Merge pull request #990 from mariuszkurek/master
...
Make SDL and Qt binary names consistent
2021-11-02 13:15:27 -07:00
Thomas Harte
d989825216
Add bonus notes on VPOSR.
2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88
Retains a little more of output controls.
2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43
Switch to using the swizzled palette for playfield output.
2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a
Delay bitplane installation until end of slot.
2021-11-01 14:18:58 -07:00
mariuszkurek
04f4536cb2
Make SDL and Qt binary names consistent
2021-11-01 09:13:06 +01:00
Thomas Harte
4e66017205
Enable sprite reuse and toggle to inactive when visible region is over.
2021-10-31 16:52:48 -07:00
Thomas Harte
2c1f2edcf2
Introduce failing 'clock' test case.
...
i.e. a few seconds of the Workbench 1.0 clock application.
2021-10-31 16:12:51 -07:00
Thomas Harte
299d517449
Performs a first implementation of fill mode.
2021-10-31 14:36:31 -07:00
Thomas Harte
561e73dbd7
Merge branch 'Amiga' of github.com:TomHarte/CLK into Amiga
2021-10-31 14:12:40 -07:00
Thomas Harte
9e6ffaad7d
Introduce test case for fill mode.
2021-10-31 14:12:26 -07:00
Thomas Harte
9cded1e92c
Introduce test case for fill mode.
2021-10-31 14:08:37 -07:00
Thomas Harte
4c1ab6ff25
Rethinks bitplane stops.
2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a
Avoid duplication of CIA select test.
2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826
VHPOSR's fields are the other way around.
2021-10-30 12:04:46 -07:00
Thomas Harte
9ecd43238f
Correct 8520 TOD setting and getting.
2021-10-30 12:02:43 -07:00
Thomas Harte
5ffe71346c
Eliminate interrupt magic constants.
2021-10-29 19:04:06 -07:00
Thomas Harte
d25804f4a2
Throws in official register names.
2021-10-29 14:05:11 -07:00
Thomas Harte
edb75e69cb
Implement bitplane modulos.
2021-10-29 11:29:22 -07:00
Thomas Harte
f3e895f17c
Tag intended unused parameters.
2021-10-29 06:21:02 -07:00
Thomas Harte
b952d73e83
Disallow programmatic setting of blitter status.
2021-10-29 06:19:57 -07:00
Thomas Harte
07facc0636
Takes a stab at BZERO.
2021-10-28 18:12:46 -07:00
Thomas Harte
da1a69be27
Caps mouse speed.
...
Also takes another guess at CIA interrupt bits. To no avail.
2021-10-27 18:38:02 -07:00
Thomas Harte
7e31658932
Remove accidental commit.
2021-10-26 21:49:32 -07:00
Thomas Harte
5ebc59dd1f
Introduce additional test cases.
2021-10-26 20:58:38 -07:00
Thomas Harte
b10f5ab110
Apply A mask when loading into barrel shifter.
2021-10-26 20:02:28 -07:00
Thomas Harte
b4286bb42b
Modulos are subtracted in descending mode.
2021-10-26 07:21:51 -07:00
Thomas Harte
4d7ce3792f
Use additional test cases.
2021-10-25 21:48:43 -07:00
Thomas Harte
76767da300
Undo accidental change.
2021-10-25 21:48:19 -07:00
Thomas Harte
dc8701a929
Introduce some additional Blitter test cases.
2021-10-25 21:40:20 -07:00
Thomas Harte
139d35c6f9
Switches to basic use of sprite shifters.
2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a
Starts on a two-at-a-time sprite shifter.
2021-10-25 16:30:30 -07:00
Thomas Harte
9f3efb7f05
Limits graphical output to [all but one bit] of the display window.
2021-10-25 14:12:23 -07:00
Thomas Harte
e6001e0f22
Shifts bitplanes irrespective of output window.
2021-10-25 13:59:39 -07:00
Thomas Harte
c6535bf035
Switches bitplane shifter to returning four high-res pixels at a time.
2021-10-25 13:34:36 -07:00
Thomas Harte
7118a515e0
Reduce logging in trustworthy areas.
2021-10-23 20:36:41 -07:00
Thomas Harte
952451c9b8
Add mouse input.
2021-10-23 20:17:13 -07:00