Thomas Harte
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8ce018dbab
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Adds the necessary runtime support for AND, EOR and OR.
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2019-04-16 15:17:40 -04:00 |
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Thomas Harte
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180062c58c
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Finishes fleshing out [ADD/SUB]Q.
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2019-04-16 14:28:31 -04:00 |
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Thomas Harte
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37656f14d8
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Adds basic addressing modes for [ADD/SUB]Q.
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2019-04-16 11:19:45 -04:00 |
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Thomas Harte
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dec5535e54
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Implements (arguably: fixes) BSR.
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2019-04-15 23:20:36 -04:00 |
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Thomas Harte
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1f0e3b157a
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Corrects a couple of JSR and JMP addressing modes.
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2019-04-15 22:37:11 -04:00 |
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Thomas Harte
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d802e83f49
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Fills in further MOVEs.
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2019-04-15 22:25:22 -04:00 |
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Thomas Harte
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ebcae25762
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Adjusts JSR behaviour and further extends MOVE.
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2019-04-15 22:02:52 -04:00 |
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Thomas Harte
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5330267d16
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Implements BCLR.
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2019-04-15 18:11:02 -04:00 |
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Thomas Harte
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892476973b
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Attempts RO{X}[L/R].
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2019-04-15 17:31:58 -04:00 |
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Thomas Harte
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84f4a25bc9
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Completes TST.
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2019-04-15 16:28:20 -04:00 |
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Thomas Harte
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1460a88bb3
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Takes a run at JSR and RTS.
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2019-04-15 15:14:38 -04:00 |
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Thomas Harte
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d25ab35d58
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Finally gets setw usage correct.
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2019-04-15 12:41:56 -04:00 |
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Thomas Harte
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a223cd90a1
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Adds predecrement TSTs, increases QL running time, reduces logging.
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2019-04-15 12:36:08 -04:00 |
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Thomas Harte
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aef92ba29c
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Corrects immediate shift count.
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2019-04-15 12:25:45 -04:00 |
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Thomas Harte
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328d297490
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Implements the first few addressing modes for TST.
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2019-04-15 10:03:52 -04:00 |
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Thomas Harte
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3d240f3f18
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Corrects decoding of DBcc.
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2019-04-15 09:49:23 -04:00 |
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Thomas Harte
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45f35236a7
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Corrects decoding of ADDA and SUBA.
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2019-04-15 09:44:06 -04:00 |
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Thomas Harte
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fba210f7ce
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Corrects MOVE.l Dn, (An)[+].
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2019-04-15 09:30:49 -04:00 |
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Thomas Harte
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8a09e5fc16
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Implements Scc.
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2019-04-14 22:39:13 -04:00 |
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Thomas Harte
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75d8824e6b
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Eliminates implicit type conversion.
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2019-04-14 21:02:28 -04:00 |
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Thomas Harte
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325af677d3
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Implements MOVEM to M with an implicit type conversion.
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2019-04-14 20:53:27 -04:00 |
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Thomas Harte
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1003e70b5e
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Implements MOVEM to R.
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2019-04-14 20:02:18 -04:00 |
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Thomas Harte
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d70229201d
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Advances right up to the lack of MOVEM actions being the final piece.
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2019-04-14 14:45:29 -04:00 |
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Thomas Harte
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823f91605b
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Still slow pedalling slightly, adds further MOVEM storage.
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2019-04-14 14:31:13 -04:00 |
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Thomas Harte
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53f75034fc
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Commits at least to decoding MOVEM.
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2019-04-14 14:09:28 -04:00 |
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Thomas Harte
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78649a5b54
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Fleshes out MOVE, (XXX) a little further.
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2019-04-12 17:16:03 -04:00 |
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Thomas Harte
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f48db625a0
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Corrects write-back and zero flag for ADD/SUB.l.
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2019-04-12 16:41:00 -04:00 |
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Thomas Harte
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2ba66c4457
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Corrects MOVEA, adds extra test safeguards.
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2019-04-12 16:10:17 -04:00 |
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Thomas Harte
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2c78ea1a4e
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Completes conversion away from magic constants.
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2019-04-12 15:48:29 -04:00 |
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Thomas Harte
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73f50ac44e
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Commits further to elimination of magic constants.
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2019-04-12 13:45:28 -04:00 |
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Thomas Harte
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9ce48953c1
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Improves debugging printout.
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2019-04-12 13:45:03 -04:00 |
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Thomas Harte
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1098cd0c6b
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Begins rooting out magic constants.
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2019-04-11 22:31:17 -04:00 |
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Thomas Harte
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652ebd143c
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Corrects addressing mode support for LEA.
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2019-04-11 11:58:34 -04:00 |
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Thomas Harte
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8e9d7c0f40
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Corrects register-relative address calculation.
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2019-04-10 23:09:03 -04:00 |
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Thomas Harte
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a64948a2ba
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Permits zero-bus-op non-terminals.
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2019-04-10 22:42:43 -04:00 |
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Thomas Harte
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43f619a081
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Implements ASL, ASR, LSL and LSR.
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2019-04-10 22:31:04 -04:00 |
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Thomas Harte
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a07de97df4
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Implements the fixed part of register shifts.
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2019-04-09 22:12:37 -04:00 |
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Thomas Harte
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85d25068a8
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Attempts a full implementation of memory shifts.
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2019-04-09 22:04:25 -04:00 |
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Thomas Harte
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7a0319cfe5
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Kicks the work of dealing with ASL/etc into the runtime.
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2019-04-09 21:48:08 -04:00 |
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Thomas Harte
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f750671f33
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Stepping gingerly onwards, adds a double-decoding test.
As a result of that, collapses BRA into Bcc. Which provisionally looks correct.
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2019-04-09 16:54:41 -04:00 |
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Thomas Harte
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7886fe677a
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Cleans up commenting.
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2019-04-08 22:51:18 -04:00 |
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Thomas Harte
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73c027f8e3
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Implements CMPA and CMPM. [Provisionally] completing the CMPs.
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2019-04-08 22:40:38 -04:00 |
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Thomas Harte
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eda88cc462
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Implements MOVE to CCR.
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2019-04-07 22:24:17 -04:00 |
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Thomas Harte
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652f4ebfed
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Implements CLR, NEG, NEGX and NOT.
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2019-04-07 22:07:39 -04:00 |
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Thomas Harte
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06a2f59bd0
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Implements DBcc.
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2019-04-06 23:21:01 -04:00 |
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Thomas Harte
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03f365e696
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Corrects source/destination order of CMP setup.
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2019-04-06 20:00:15 -04:00 |
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Thomas Harte
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49a22674ba
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Corrects MOVE destinations.
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2019-04-06 18:33:53 -04:00 |
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Thomas Harte
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ec494511ec
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Implements CMP.
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2019-04-06 10:41:19 -04:00 |
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Thomas Harte
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af02ce9c6e
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Attempts to correct various instances of PC-relative addressing.
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2019-04-05 23:49:13 -04:00 |
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Thomas Harte
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56e42859ab
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Ensures the supervisor flag is updated properly on MOVE to SR.
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2019-04-05 23:21:50 -04:00 |
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