Thomas Harte
|
d802e83f49
|
Fills in further MOVEs.
|
2019-04-15 22:25:22 -04:00 |
|
Thomas Harte
|
ebcae25762
|
Adjusts JSR behaviour and further extends MOVE.
|
2019-04-15 22:02:52 -04:00 |
|
Thomas Harte
|
5330267d16
|
Implements BCLR.
|
2019-04-15 18:11:02 -04:00 |
|
Thomas Harte
|
892476973b
|
Attempts RO{X}[L/R].
|
2019-04-15 17:31:58 -04:00 |
|
Thomas Harte
|
84f4a25bc9
|
Completes TST.
|
2019-04-15 16:28:20 -04:00 |
|
Thomas Harte
|
1460a88bb3
|
Takes a run at JSR and RTS.
|
2019-04-15 15:14:38 -04:00 |
|
Thomas Harte
|
62e4c23961
|
Corrects memory map, causing the RAM test no longer to fail.
|
2019-04-15 13:03:32 -04:00 |
|
Thomas Harte
|
d25ab35d58
|
Finally gets setw usage correct.
|
2019-04-15 12:41:56 -04:00 |
|
Thomas Harte
|
a223cd90a1
|
Adds predecrement TSTs, increases QL running time, reduces logging.
|
2019-04-15 12:36:08 -04:00 |
|
Thomas Harte
|
aef92ba29c
|
Corrects immediate shift count.
|
2019-04-15 12:25:45 -04:00 |
|
Thomas Harte
|
328d297490
|
Implements the first few addressing modes for TST.
|
2019-04-15 10:03:52 -04:00 |
|
Thomas Harte
|
3d240f3f18
|
Corrects decoding of DBcc.
|
2019-04-15 09:49:23 -04:00 |
|
Thomas Harte
|
45f35236a7
|
Corrects decoding of ADDA and SUBA.
|
2019-04-15 09:44:06 -04:00 |
|
Thomas Harte
|
fba210f7ce
|
Corrects MOVE.l Dn, (An)[+].
|
2019-04-15 09:30:49 -04:00 |
|
Thomas Harte
|
8a09e5fc16
|
Implements Scc.
|
2019-04-14 22:39:13 -04:00 |
|
Thomas Harte
|
52e33e861c
|
Starts to introduce the QL as a second source for 68000 testing.
It's advantageous over the ST in that a commented disassembly of the ROM is available.
|
2019-04-14 22:15:09 -04:00 |
|
Thomas Harte
|
75d8824e6b
|
Eliminates implicit type conversion.
|
2019-04-14 21:02:28 -04:00 |
|
Thomas Harte
|
325af677d3
|
Implements MOVEM to M with an implicit type conversion.
|
2019-04-14 20:53:27 -04:00 |
|
Thomas Harte
|
1003e70b5e
|
Implements MOVEM to R.
|
2019-04-14 20:02:18 -04:00 |
|
Thomas Harte
|
d70229201d
|
Advances right up to the lack of MOVEM actions being the final piece.
|
2019-04-14 14:45:29 -04:00 |
|
Thomas Harte
|
823f91605b
|
Still slow pedalling slightly, adds further MOVEM storage.
|
2019-04-14 14:31:13 -04:00 |
|
Thomas Harte
|
53f75034fc
|
Commits at least to decoding MOVEM.
|
2019-04-14 14:09:28 -04:00 |
|
Thomas Harte
|
78649a5b54
|
Fleshes out MOVE, (XXX) a little further.
|
2019-04-12 17:16:03 -04:00 |
|
Thomas Harte
|
f48db625a0
|
Corrects write-back and zero flag for ADD/SUB.l.
|
2019-04-12 16:41:00 -04:00 |
|
Thomas Harte
|
2ba66c4457
|
Corrects MOVEA, adds extra test safeguards.
|
2019-04-12 16:10:17 -04:00 |
|
Thomas Harte
|
2c78ea1a4e
|
Completes conversion away from magic constants.
|
2019-04-12 15:48:29 -04:00 |
|
Thomas Harte
|
73f50ac44e
|
Commits further to elimination of magic constants.
|
2019-04-12 13:45:28 -04:00 |
|
Thomas Harte
|
9ce48953c1
|
Improves debugging printout.
|
2019-04-12 13:45:03 -04:00 |
|
Thomas Harte
|
1098cd0c6b
|
Begins rooting out magic constants.
|
2019-04-11 22:31:17 -04:00 |
|
Thomas Harte
|
652ebd143c
|
Corrects addressing mode support for LEA.
|
2019-04-11 11:58:34 -04:00 |
|
Thomas Harte
|
8e9d7c0f40
|
Corrects register-relative address calculation.
|
2019-04-10 23:09:03 -04:00 |
|
Thomas Harte
|
a64948a2ba
|
Permits zero-bus-op non-terminals.
|
2019-04-10 22:42:43 -04:00 |
|
Thomas Harte
|
43f619a081
|
Implements ASL, ASR, LSL and LSR.
|
2019-04-10 22:31:04 -04:00 |
|
Thomas Harte
|
a07de97df4
|
Implements the fixed part of register shifts.
|
2019-04-09 22:12:37 -04:00 |
|
Thomas Harte
|
85d25068a8
|
Attempts a full implementation of memory shifts.
|
2019-04-09 22:04:25 -04:00 |
|
Thomas Harte
|
7a0319cfe5
|
Kicks the work of dealing with ASL/etc into the runtime.
|
2019-04-09 21:48:08 -04:00 |
|
Thomas Harte
|
f750671f33
|
Stepping gingerly onwards, adds a double-decoding test.
As a result of that, collapses BRA into Bcc. Which provisionally looks correct.
|
2019-04-09 16:54:41 -04:00 |
|
Thomas Harte
|
7886fe677a
|
Cleans up commenting.
|
2019-04-08 22:51:18 -04:00 |
|
Thomas Harte
|
73c027f8e3
|
Implements CMPA and CMPM. [Provisionally] completing the CMPs.
|
2019-04-08 22:40:38 -04:00 |
|
Thomas Harte
|
eda88cc462
|
Implements MOVE to CCR.
|
2019-04-07 22:24:17 -04:00 |
|
Thomas Harte
|
652f4ebfed
|
Implements CLR, NEG, NEGX and NOT.
|
2019-04-07 22:07:39 -04:00 |
|
Thomas Harte
|
06a2f59bd0
|
Implements DBcc.
|
2019-04-06 23:21:01 -04:00 |
|
Thomas Harte
|
0af57806da
|
Adds a hard-coded value sufficient to advance in TOS startup.
|
2019-04-06 20:00:34 -04:00 |
|
Thomas Harte
|
03f365e696
|
Corrects source/destination order of CMP setup.
|
2019-04-06 20:00:15 -04:00 |
|
Thomas Harte
|
49a22674ba
|
Corrects MOVE destinations.
|
2019-04-06 18:33:53 -04:00 |
|
Thomas Harte
|
ec494511ec
|
Implements CMP.
|
2019-04-06 10:41:19 -04:00 |
|
Thomas Harte
|
af02ce9c6e
|
Attempts to correct various instances of PC-relative addressing.
|
2019-04-05 23:49:13 -04:00 |
|
Thomas Harte
|
56e42859ab
|
Ensures the supervisor flag is updated properly on MOVE to SR.
|
2019-04-05 23:21:50 -04:00 |
|
Thomas Harte
|
2d153359f8
|
Adds BTST.
|
2019-04-04 21:43:22 -04:00 |
|
Thomas Harte
|
068ce23716
|
Adds a few more MOVEs.
|
2019-04-04 19:49:19 -04:00 |
|