Thomas Harte
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9ea3e547ee
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Fix IRQ/FIQ return addresses.
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2024-03-22 21:42:34 -04:00 |
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Thomas Harte
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85a738acff
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Get rigorous on exception addresses.
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2024-03-19 15:03:31 -04:00 |
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Thomas Harte
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9d858bc61b
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IRQ and FIQ should also store PC+4.
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2024-03-18 14:08:08 -04:00 |
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Thomas Harte
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1c1d2891c7
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Adjust IRQ/FIQ return addresses.
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2024-03-15 21:59:38 -04:00 |
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Thomas Harte
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1979d2e5ba
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Don't set interrupt flags before capture.
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2024-03-15 21:34:39 -04:00 |
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Thomas Harte
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c25d0e8843
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Correctly capture mode upon exception.
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2024-03-15 18:39:56 -04:00 |
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Thomas Harte
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5d6bb11eb7
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Add return.
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2024-03-12 11:37:15 -04:00 |
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Thomas Harte
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c6b91559e1
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Attempt to wire up timer interrupts.
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2024-03-12 11:34:31 -04:00 |
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Thomas Harte
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6efc41ded7
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Come to conclusion on R15; fix link values.
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2024-03-12 10:42:09 -04:00 |
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Thomas Harte
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d059e7c5d8
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Disallow copying.
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2024-03-09 15:10:55 -05:00 |
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Thomas Harte
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fdef8901ab
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Double down on uint32_t.
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2024-03-08 14:13:34 -05:00 |
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Thomas Harte
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ca1c3dc005
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Add extra comments.
To persuade myself in the future.
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2024-03-08 11:36:17 -05:00 |
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Thomas Harte
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1b7c3644f4
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Eliinate meaningless 'const'.
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2024-03-04 14:09:27 -05:00 |
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Thomas Harte
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0cdca12e06
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Resolve type mismatches.
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2024-03-04 13:53:46 -05:00 |
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Thomas Harte
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61d4c69e45
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Fix template parameter reference.
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2024-03-04 13:25:40 -05:00 |
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Thomas Harte
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79865e295b
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Avoid ambiguous template parameter; use standard type.
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2024-03-04 12:20:40 -05:00 |
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Thomas Harte
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230e9c6327
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Obscure active .
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2024-03-03 21:43:30 -05:00 |
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Thomas Harte
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11c4d2f09e
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Add further exposition.
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2024-03-03 21:38:27 -05:00 |
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Thomas Harte
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b42a6e447d
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Tie down more corners.
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2024-03-03 21:29:53 -05:00 |
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Thomas Harte
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62da0dee7f
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Unify reads.
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2024-03-02 23:15:17 -05:00 |
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Thomas Harte
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1663d3d9d1
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Introduce disaster of an attempted test run.
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2024-03-02 22:40:12 -05:00 |
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Thomas Harte
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42ba6d1281
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Relocate execution code appropriately.
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2024-03-01 15:02:47 -05:00 |
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Thomas Harte
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5759798ad7
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Deal with downward write order.
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2024-02-29 14:34:20 -05:00 |
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Thomas Harte
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fd2c5b6679
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Make a quick first attempt at memory accesses.
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2024-02-29 10:18:09 -05:00 |
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Thomas Harte
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3b320bcdef
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Update coprocessor interface.
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2024-02-28 14:43:31 -05:00 |
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Thomas Harte
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3368bdb99f
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Document exceptions, partly for my future self.
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2024-02-28 14:34:31 -05:00 |
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Thomas Harte
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4d400c3cb7
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Add easy exceptions.
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2024-02-28 14:25:12 -05:00 |
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Thomas Harte
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474f9da3c2
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Add banked registers.
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2024-02-28 14:09:05 -05:00 |
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Thomas Harte
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60d1b36e9a
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Implement registers side.
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2024-02-28 10:25:14 -05:00 |
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Thomas Harte
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5a48c15e46
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Add scheduler side of PC writeback.
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2024-02-28 10:15:23 -05:00 |
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Thomas Harte
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d6bf1808f9
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Take a swing at PC-as-input.
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2024-02-28 09:33:05 -05:00 |
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Thomas Harte
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b676153d21
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State intention to merge status with other registers.
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2024-02-27 15:36:34 -05:00 |
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