 Thomas Harte
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abe55fe950
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Adds Timer 1 toggling of PB7.
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2019-06-03 15:39:20 -04:00 |
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Thomas Harte
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4d4ddded6d
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Fixes register-relative JMP and JSR.
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2019-06-03 15:29:50 -04:00 |
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Thomas Harte
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1328708a70
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Switches to testing against the Mac Plus ROM.
Immediately uncovering an issue with JMP.
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2019-06-03 14:54:18 -04:00 |
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Thomas Harte
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85298319fa
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Expands towards supporting multiple Macintosh models.
To provide another variable to help with bug isolation.
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2019-06-03 14:50:36 -04:00 |
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Thomas Harte
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881feb1bd3
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Adds preliminary parsing of the Disk Copy 4.2 format.
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2019-06-02 13:39:25 -04:00 |
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Thomas Harte
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3e9fa63799
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Adds a receiver for drive-motor control bytes.
My new belief is that I'm either reading the buffer from the wrong place, or the 68000 isn't filling it for some reason.
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2019-06-01 19:31:32 -04:00 |
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Thomas Harte
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da2b190288
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Stores expected bit length.
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2019-06-01 19:08:29 -04:00 |
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Thomas Harte
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48d837c636
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Attempts to respond more sensibly to various queries.
Including adding a 1-second delay on motor off.
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2019-06-01 18:43:47 -04:00 |
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Thomas Harte
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983407896c
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Ensures consistent audio pipeline.
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2019-06-01 17:29:57 -04:00 |
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Thomas Harte
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5c08bb810e
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In theory provides a full implementation of audio.
Albeit seemingly ineffective.
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2019-06-01 15:44:29 -04:00 |
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Thomas Harte
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17635da812
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Pushes Mac audio further towards being able to function.
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2019-06-01 15:18:27 -04:00 |
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Thomas Harte
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6d985866ee
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All proper inputs are now provided to the audio generator.
Hopefully. The next job is to generate audio. If that sounds correct, then the disk motor speed question can be tackled.
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2019-06-01 15:03:15 -04:00 |
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Thomas Harte
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723137c0d4
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With some time additions to the 6522, starts wiring in Macintosh audio.
The audio buffer is also the disk motor buffer, so this is preparatory to further disk work.
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2019-06-01 14:39:40 -04:00 |
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Thomas Harte
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938928865d
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Merge branch 'master' into Mac128k
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2019-05-30 22:29:56 -04:00 |
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 Thomas Harte
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d80b0cbf90
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Merge pull request #622 from TomHarte/SConstructUTF
Adds recommended fix for 0xc3 in position 12 error.
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2019-05-30 22:25:57 -04:00 |
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Thomas Harte
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e88ef30ce6
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Adds recommended fix for 0xc3 in position 12 error.
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2019-05-30 22:20:15 -04:00 |
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Thomas Harte
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4197c6f149
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Attempts to make some further semantic sense of the various IWM controls.
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2019-05-30 22:17:49 -04:00 |
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Thomas Harte
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035f07877c
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Reduces conversions to vector.
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2019-05-30 12:08:35 -04:00 |
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Thomas Harte
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4632be4fe5
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Wires up the final IWM signal, SEL, preparatory to an implementation.
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2019-05-30 12:08:00 -04:00 |
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Thomas Harte
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b3d2b4cd37
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Fixes the interrupt return address.
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2019-05-29 20:27:46 -04:00 |
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Thomas Harte
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c86fe9ada9
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Ensures replace_write_values works in release builds.
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2019-05-29 19:00:53 -04:00 |
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Thomas Harte
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ecf93b7822
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Eliminates some type conversion warnings.
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2019-05-29 14:56:50 -04:00 |
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Thomas Harte
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541b75ee6e
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Further fixes PEA, and OR/AND/EOR Dn, (An).
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2019-05-29 14:37:15 -04:00 |
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Thomas Harte
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77b08febdb
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Corrects PEA and adds an additional debugging aid.
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2019-05-29 12:47:17 -04:00 |
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Thomas Harte
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fcda376f33
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Removes three further type conversion warnings.
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2019-05-28 21:56:49 -04:00 |
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Thomas Harte
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0848fc7e03
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Ensures the Mac uses auto vectored interrupts.
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2019-05-28 16:24:41 -04:00 |
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Thomas Harte
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3bb8d6717f
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Ensures A7 is correct at end of an UNLINK.
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2019-05-28 16:02:42 -04:00 |
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Thomas Harte
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5e2496d59c
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Simplifies and corrects MOVE logic.
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2019-05-28 15:17:03 -04:00 |
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Thomas Harte
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c52da9d802
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Adds some logging preparatory to a MOVE change.
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2019-05-28 15:05:42 -04:00 |
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Thomas Harte
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1d3dde32f2
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Ensures final byte of data can be accessed.
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2019-05-09 07:24:26 -04:00 |
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Thomas Harte
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0b999ce0e4
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Attempts to fix register-relative JSRs.
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2019-05-09 06:43:07 -04:00 |
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Thomas Harte
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b04bd7069d
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Corrects Scc and DBcc (xxx).l and (xxx).w.
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2019-05-09 06:28:55 -04:00 |
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Thomas Harte
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249b0fbb32
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Corrects PC on stack after an illegal instruction.
Also fixed LOG_TRACE functionality.
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2019-05-08 22:36:25 -04:00 |
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Thomas Harte
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41740fb45e
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Implements video position feedback.
At a substantial performance cost for now, but I'll worry about that once things are working.
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2019-05-08 16:54:19 -04:00 |
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Thomas Harte
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0ad88508f7
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Removes ROM mirroring above $600000.
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2019-05-08 15:07:03 -04:00 |
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Thomas Harte
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8293b18278
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Adds a TODO on what I think might be an incorrect implementation?
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2019-05-08 15:06:40 -04:00 |
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Thomas Harte
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2ba0364850
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Adds the shift register interrupt.
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2019-05-08 15:02:07 -04:00 |
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Thomas Harte
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8b72043f33
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Ensures no uninitialised variables.
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2019-05-08 14:54:54 -04:00 |
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Thomas Harte
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2e7bc0b98a
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Attempts the shift register.
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2019-05-08 14:54:40 -04:00 |
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Thomas Harte
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f0f9722ca6
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Takes a first crack at the keyboard's serial protocol.
Albeit that without a working shift register in the VIA, this shouldn't really work yet.
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2019-05-08 14:20:28 -04:00 |
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Thomas Harte
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b5ef88902b
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Edges further towards a functioning keyboard.
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2019-05-08 13:58:52 -04:00 |
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Thomas Harte
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8278809383
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Attempts to get more rigorous on communicating outward control line changes.
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2019-05-08 13:33:22 -04:00 |
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Thomas Harte
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4367459cf2
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Takes a first go at handshake and pulse modes.
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2019-05-08 12:48:29 -04:00 |
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Thomas Harte
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254132b83d
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Eliminates 6522Base in pursuit of working handshake modes.
Specifically: this means that the places from which the BusHandler may be called are more numerous.
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2019-05-08 12:35:17 -04:00 |
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Thomas Harte
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7b466e6d0a
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Begins work on a functioning keyboard.
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2019-05-08 12:34:26 -04:00 |
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Thomas Harte
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7e6d4f5a3e
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Adds emulation of the real-time clock.
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2019-05-08 00:12:19 -04:00 |
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Thomas Harte
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ce099a297a
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Eliminates RAM writes in ROM area.
I no longer think that logic is correct.
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2019-05-07 17:16:22 -04:00 |
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Thomas Harte
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949c848815
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Broadens address decoding.
To no obvious change in output.
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2019-05-06 22:57:29 -04:00 |
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Thomas Harte
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9bf9b9ea8c
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Ensures unmapped peripherals return a consistent value.
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2019-05-06 21:32:10 -04:00 |
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Thomas Harte
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d8ed8b66f3
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Improves carry/extend for ROXL and ROXR.
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2019-05-06 21:14:16 -04:00 |
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