1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-22 12:33:29 +00:00
Commit Graph

54 Commits

Author SHA1 Message Date
Thomas Harte
bc5727af14 Switch to = default. 2024-02-16 21:50:15 -05:00
Thomas Harte
a3d37640aa Switch include guards to #pragma once. 2024-01-16 23:34:46 -05:00
Thomas Harte
267006782f Starts to add Qt target; resolves many build warnings. 2020-05-30 00:37:06 -04:00
Thomas Harte
31c6faf3c8 Adds a bunch of consts. 2020-05-09 21:23:52 -04:00
Thomas Harte
c755411636 Slightly improves comments. 2020-01-19 20:05:22 -05:00
Thomas Harte
aac3d27c10 Adds activity indicators for the BD-500 and Jasmin.
Also slightly cleans up DiskController a little further.
2020-01-15 23:39:15 -05:00
Thomas Harte
c1bae49a92 Standardises on read and write for bus accesses.
Logic being: name these things for the bus action they model, not the effect they have.
2020-01-05 13:40:02 -05:00
Thomas Harte
4205e95883 Switches to capture of the track 0 flag during a type 1 operation. 2019-12-24 21:43:20 -05:00
Thomas Harte
731dc350b4 Adds sometime real-time clocking for DMA. 2019-10-30 22:59:32 -04:00
Thomas Harte
1c154131f9 Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate. 2019-10-29 22:36:29 -04:00
Thomas Harte
db8d8d8404 Commutes Sleeper to ClockingHint::Source, making state more granular. 2018-05-27 23:17:06 -04:00
Thomas Harte
0b771ce61a Removes all instances of the copyright symbol. 2018-05-13 15:19:52 -04:00
Thomas Harte
793ef68206 Implements unconditional force interrupt for the WD. 2018-01-07 19:42:38 -05:00
Thomas Harte
4cbc87a17d Corrects out-of-order initialisations for the 1770, Atari 2600 joystick, Pitfall II bus extender, Microdisc and 6502. 2017-11-10 22:20:44 -05:00
Thomas Harte
698e4fe550 Tidies the Disk file hierarchy. 2017-09-22 22:39:23 -04:00
Thomas Harte
2f13517f38 Adjusts the 1770 not to talk directly to the drive about motor status. 2017-09-11 22:10:56 -04:00
Thomas Harte
cddcd0fb79 Put my money where my mouth is and switched the superclass of WD1770 to MFMController, eliminating duplicated (/factored out) code. 2017-08-14 16:32:53 -04:00
Thomas Harte
4abd62e62b Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty. 2017-07-27 22:05:29 -04:00
Thomas Harte
a1e9a54765 Eliminated redundant uses of ClockReceiver and sought to ensure that proper run_fors are inherited all the way down. 2017-07-25 20:09:13 -04:00
Thomas Harte
8a2bdb8d22 Converted the TimedEventLoop and the things that sit atop it into ClockReceivers. 2017-07-24 21:19:05 -04:00
Thomas Harte
8755824c64 Added some documentation. 2017-07-22 17:25:53 -04:00
Thomas Harte
53f0e1896b Made delay_time_ unsigned for safe comparison. 2017-07-21 21:21:23 -04:00
Thomas Harte
f94f34f053 Made an attempt at read track. Which means process_input_bit can't just swallow syncs any more; it now reports them as tokens of type ::Sync. 2017-01-01 20:39:19 -05:00
Thomas Harte
1277a67f9a Introduced data_mode_ to replace is_reading_data_, representing that there are now three possible modes. When writing, any input from the read head won't affect the CRC generator. 2016-12-28 19:26:21 -05:00
Thomas Harte
9c0f622a2e Started working CRC checking into the 1770. Discovered immediately that my generated CRC does not match that built into the Oric disk images. So mine is pretty-much certainly wrong. An opportunity for learning! 2016-12-26 16:46:26 -05:00
Thomas Harte
e2b829f68e Made an attempt to write the proper address mark. 2016-12-25 20:15:07 -05:00
Thomas Harte
74e98fd097 Made an attempt to write actual data (albeit that CRC calculation is still missing). 2016-12-25 19:18:45 -05:00
Thomas Harte
d2ad2c756e Added enough shovelling to write rubbish for an entire sector. 2016-12-25 15:46:49 -05:00
Thomas Harte
c304db0f5a Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there. 2016-12-06 21:16:29 -05:00
Thomas Harte
93c573bfa9 Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc. 2016-12-01 21:13:16 -05:00
Thomas Harte
442986ee2c Introduced a head loading path for 1793 machines. 2016-12-01 20:12:22 -05:00
Thomas Harte
82899f2f47 Ensured flag setting is atomic, removed duplication of interrupt request versus busy, found better names for the personality testers, unified delegate protocol. 2016-12-01 07:41:52 -05:00
Thomas Harte
b31fd11470 Fixed reporting of data request line, initial status values. 2016-11-30 22:39:55 -05:00
Thomas Harte
2222cb65d6 Split the status up into flags, assembled into a register upon demand. Attempted to implement some of the differences between the 1770/1772 and 1773/1793. Albeit with a motor fix still in place. 2016-11-30 22:26:02 -05:00
Thomas Harte
84cb07613d Checked some documentation more thoroughly; the 1793 has quite different spin-up (/head load) semantics. So it's another distinct personality. Grrr. 2016-11-27 20:39:08 -08:00
Thomas Harte
02ba1f220f The '72 seems to be a '70 with altered timing. So worth differentiating. 2016-11-27 21:06:17 +08:00
Thomas Harte
2c01f9dbed Added meaningful TODOs. 2016-11-27 08:42:39 +08:00
Thomas Harte
2f459690d4 It would appear the 1770 and 1773 actually differ in relation to the (non-sensical) ability not to spin-up for a Type 2, and whether a side compare can occur. So the WD1770 class now requires a personality to be specified. Which it singly fails to honour. 2016-11-26 23:29:30 +08:00
Thomas Harte
d4a1961378 Added getters for the IRQ and DRQ lines plus a delegate to receive changes; adjusted code so that the two lines signal. 2016-11-21 13:21:49 +08:00
Thomas Harte
91235c7fd7 Fixed issue whereby parts of data that merely looked like index or ID address marks within tracks caused a resynchronisation of the tokeniser. 2016-09-27 07:36:37 -04:00
Thomas Harte
4db086949a Made an attempt to add MFM decoding to the 1770; ensured something is returned when reading the Plus 3 status register again. 2016-09-25 21:38:52 -04:00
Thomas Harte
9bbcbd1001 Renamed class, intending to turn a Disk::Drive into literally just that, and have a thing with a PLL that consumes events be a Controller. 2016-09-25 20:05:56 -04:00
Thomas Harte
6084020ab3 Added shift-break as a better way to boot suitable disks. Continued attempting to clean the 1770. 2016-09-25 14:11:22 -04:00
Thomas Harte
d50629e6aa This is clearly the winning solution. Edited down. 2016-09-24 22:36:38 -04:00
Thomas Harte
1b69ad0fd4 This attempts to implment sector reading. DFS reports an error. 2016-09-24 22:29:02 -04:00
Thomas Harte
ce4100e5b9 Fixed slots for DFS and ADFS to sideways RAM; continued working on the 1770 to get as far as trying to get the body of a sector. 2016-09-24 22:04:54 -04:00
Thomas Harte
53522e28e2 Performed an about-face on how this should probably be implemented. Now forsaking the state machine in favour of a macro'd switch-for-cooperative-event-based-messaging implementation. Let's see how this ends up looking. 2016-09-24 20:12:45 -04:00
Thomas Harte
75eb62b577 One painful step at a time, this now starts the disk rotating and gets as far as deciding whether it's about to head off on a read or a write. 2016-09-22 21:25:31 -04:00
Thomas Harte
8db0030068 Fixed ROM loading by the Electron, turned the WD1770 into a 'disk drive' (it'll do for now), persuaded it to get all the way through a very specifically convenient type 1 command. 2016-09-20 22:14:33 -04:00
Thomas Harte
7a34ae0da6 This is the start of my slog through type 1 commands. I kind of need to figure out what I'm doing about drives and PLLs now though. 2016-09-20 16:58:23 -04:00