Thomas Harte
d27ba90c07
Attempts to introduce more rigour to variable-length instruction handling.
2019-06-24 10:43:28 -04:00
Thomas Harte
d50fbfb506
Imports EXG and PEA tests, and fixes EXG timing.
2019-06-23 22:21:25 -04:00
Thomas Harte
b63231523a
Completes import of ROL tests.
2019-06-23 17:33:12 -04:00
Thomas Harte
8c8493bc9d
Ensures proper loading of the SP at reset.
2019-06-21 18:20:26 -04:00
Thomas Harte
ccfe1b13cb
Imports DIVS, MULS and MOVE from SR tests.
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Not all passing.
2019-06-21 16:03:11 -04:00
Thomas Harte
79d8d27b4c
Reintroduces use of locations_by_bus_step_ to decrease 68000 construction time.
2019-06-20 15:10:11 -04:00
Thomas Harte
440f52c943
Incorporates TRAP test.
2019-06-19 21:18:30 -04:00
Thomas Harte
8dace34e63
Imports third-party tests for ABCD, and thereby fixes ABCD.
2019-06-19 18:13:06 -04:00
Thomas Harte
c5b036fedf
Ensures aborted decodes don't overwrite prior correct ones.
2019-06-19 17:00:44 -04:00
Thomas Harte
e26ddd0ed5
Corrects address fetches for CMPI.l #, (xxx).w.
2019-06-19 13:52:56 -04:00
Thomas Harte
ca83431e54
Fixed: Scc is a byte operation.
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It was, until now, post-incrementing and pre-decrementing registers other than A7 incorrectly.
2019-06-19 13:15:12 -04:00
Thomas Harte
feafd4bdae
Eliminates further type conversion warnings.
2019-06-13 10:20:17 -04:00
Thomas Harte
4d4ddded6d
Fixes register-relative JMP and JSR.
2019-06-03 15:29:50 -04:00
Thomas Harte
035f07877c
Reduces conversions to vector.
2019-05-30 12:08:35 -04:00
Thomas Harte
c86fe9ada9
Ensures replace_write_values
works in release builds.
2019-05-29 19:00:53 -04:00
Thomas Harte
541b75ee6e
Further fixes PEA, and OR/AND/EOR Dn, (An).
2019-05-29 14:37:15 -04:00
Thomas Harte
77b08febdb
Corrects PEA and adds an additional debugging aid.
2019-05-29 12:47:17 -04:00
Thomas Harte
5e2496d59c
Simplifies and corrects MOVE logic.
2019-05-28 15:17:03 -04:00
Thomas Harte
0b999ce0e4
Attempts to fix register-relative JSRs.
2019-05-09 06:43:07 -04:00
Thomas Harte
b04bd7069d
Corrects Scc and DBcc (xxx).l and (xxx).w.
2019-05-09 06:28:55 -04:00
Thomas Harte
d8ed8b66f3
Improves carry/extend for ROXL and ROXR.
2019-05-06 21:14:16 -04:00
Thomas Harte
e6ed50383c
Corrects PEA and MOVE.l (An)[+], (xxx).L; also adds an extra test that caught the latter.
2019-05-05 22:47:54 -04:00
Thomas Harte
a873ec97eb
Also previously missing: vector.h.
2019-05-03 14:43:31 -04:00
Thomas Harte
cc8a65780e
Adds further missing includes.
2019-05-03 14:42:36 -04:00
Thomas Harte
c117deb43b
Introduces a couple of missing #includes.
2019-05-03 14:37:05 -04:00
Thomas Harte
291e91375f
Takes a shot at the synchronous bus.
2019-05-03 14:20:59 -04:00
Thomas Harte
1d9608efc7
Alters the order of interrupt bus activity, to bring it into line with a real 68000.
2019-05-02 15:25:43 -04:00
Thomas Harte
bb07206c55
Corrects internet response to work as currently implemented.
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Also makes corrections to the bus error and address error exceptions.
2019-05-01 21:59:06 -04:00
Thomas Harte
f6ac407e4d
Takes further steps towards supporting interrupts.
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Specifically:
* introduces the necessary bus signalling; and
* adds corresponding functional steps.
Still to figure out: getting into and out of an interrupt cycle.
2019-05-01 15:19:24 -04:00
Thomas Harte
078c3135df
The 5/3 split of microcycles appears not accurately to model when lines are tested.
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Therefore I've reverted to a more normative 4:4 form.
2019-04-30 22:09:13 -04:00
Thomas Harte
31bb770fdd
Implement STOPpages, waits for DTack, and bus and address error exceptions.
2019-04-30 19:24:22 -04:00
Thomas Harte
eb4233e2fd
Joins some commonalities, shaving about 150 lines of code.
2019-04-29 22:37:23 -04:00
Thomas Harte
6b4c656849
Reverses order of instruction instantiation, reducing total bus step heft by about 11%.
...
... since that means inserting more complicated instructions before simpler ones in general, making subset finds more likely.
2019-04-29 22:20:18 -04:00
Thomas Harte
1b8fada6aa
Restores accidentally-cropped functionality.
2019-04-29 22:10:00 -04:00
Thomas Harte
977f9ee831
Takes a run at divide-by-zero exceptions and starts looking towards ways to improve startup time.
2019-04-29 22:08:16 -04:00
Thomas Harte
16fb3b49a5
It leads to a TODO, but implemented decoding and initial setup of STOPpages.
2019-04-29 19:30:00 -04:00
Thomas Harte
05d1eda422
Fixes crossed-over decoding of EORI and ORI.
2019-04-29 17:45:52 -04:00
Thomas Harte
31f318ad43
Fixes MOVE.bw #, (xxx).w.
2019-04-29 17:41:46 -04:00
Thomas Harte
c466b6f9e7
Factors out the [unit testing] stuff of being a trace-checking 68000 bus handler.
2019-04-29 16:11:01 -04:00
Thomas Harte
d9071ee9f1
Starts sketching out the asynchronous bus.
2019-04-29 13:45:53 -04:00
Thomas Harte
97e118abfa
Corrects accidental exclusion of MOVE.bw (xxx).w, [(xxx).w/(xxx).l].
2019-04-28 23:25:46 -04:00
Thomas Harte
412f091d76
Implements a missing form of BTST.
2019-04-28 23:20:50 -04:00
Thomas Harte
ca1f669e64
Implements MOVEP.
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371 is now the alleged number of missing opcodes. But I'd dare imagine it's more like three or four.
2019-04-28 22:52:54 -04:00
Thomas Harte
0298b1b3b7
Implements LINK and UNLINK.
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Also starts excluding opcodes that I can't determine the mapping of from the list of those tested against.
Due to those two things together, the latter incomplete: 627 opcodes outstanding. But only STOP and MOVEP remain on my list of things to implement prior to exceptions.
2019-04-28 17:12:31 -04:00
Thomas Harte
4b1324de77
Takes a run at TRAPV.
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... to leave 1466 as the unimplemented count.
2019-04-28 15:52:58 -04:00
Thomas Harte
8e8dce9bec
Attempts an implementation of CHK.
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1467 is now the official count of things to implement, though I'm starting to get suspicious.
2019-04-28 15:47:21 -04:00
Thomas Harte
f4350522bf
Implements NBCD.
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Now outstanding: 1891.
2019-04-27 21:29:50 -04:00
Thomas Harte
e2abb66a11
Adds missing addressing modes for ADDA and SUBA.
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... reducing missing opcodes to 1941.
2019-04-27 17:22:26 -04:00
Thomas Harte
ab5fcab9bf
Attempts an implementation of ADDX and SUBX.
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Leaving 2005 non-[A/F]-line instructions.
2019-04-27 16:57:47 -04:00
Thomas Harte
e75b386f7d
Attempts DIVU and DIVS.
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Reportedly leaving 10965 operations now unimplemented.
2019-04-26 22:22:35 -04:00