Thomas Harte
5d1970d201
Adds a hacky different guess at how register access might work.
2021-02-19 21:46:18 -05:00
Thomas Harte
72d7901c88
Takes a shot at the keyboard data full flag.
...
Just a guess. But likely?
2021-02-19 20:06:12 -05:00
Thomas Harte
60cfec6a65
Amongst ever more cruft, adds a couple of extra asserts.
2021-02-18 22:49:48 -05:00
Thomas Harte
2e9065b34c
Increases number of fixed initial values.
2021-02-18 22:48:53 -05:00
Thomas Harte
992ee6d631
Don't zero out the program bank until after it has headed stackward.
2021-02-17 22:08:08 -05:00
Thomas Harte
772093c311
Add missing header.
2021-02-16 22:51:57 -05:00
Thomas Harte
e42843cca0
This may temporarily exhaust my wit for asserts.
2021-02-16 22:47:46 -05:00
Thomas Harte
3336a123f8
Asserts even more overtly.
2021-02-16 22:33:28 -05:00
Thomas Harte
bd54e30748
Adds workaround for Sweet 16, which can produce bad data.
2021-02-16 22:21:10 -05:00
Thomas Harte
35be402354
Improve sanity check.
2021-02-16 19:47:25 -05:00
Thomas Harte
28bd620e7f
Adds joystick support to the IIgs.
2021-02-16 19:39:22 -05:00
Thomas Harte
96f2d802d9
Adds a safeguard against undefined behaviour in the debugger.
2021-02-16 19:17:54 -05:00
Thomas Harte
b117df3367
Factors out joystick logic.
2021-02-16 19:17:32 -05:00
Thomas Harte
fa8236741d
Takes a shot at an ADB mouse.
2021-02-15 20:49:16 -05:00
Thomas Harte
e16d5f33d1
Adds service requests. The microcontroller now appears to consume keyboard events.
2021-02-15 20:33:10 -05:00
Thomas Harte
2a45e7a8d4
Slows timer X, to what may or may not be correct.
2021-02-15 16:40:27 -05:00
Thomas Harte
f8f0ff0fae
Add timer X counting.
...
Still no interrupts.
2021-02-15 16:29:25 -05:00
Thomas Harte
f5dcff2f29
Honours interrupt vector.
2021-02-15 15:05:56 -05:00
Thomas Harte
e773b331cd
Implements register 2 listen.
2021-02-15 15:05:46 -05:00
Thomas Harte
99c21925f4
Makes attempt at keyboard mapping.
2021-02-15 15:00:12 -05:00
Thomas Harte
eccf5ca043
Makes first effort to wire up the ADB vertical blank input.
...
However: looking at the disassembly, I'm not sure it really is wired to INTR. So work to do.
2021-02-14 22:20:58 -05:00
Thomas Harte
24af62a3e5
Sets a default handler of 1.
2021-02-14 22:20:07 -05:00
Thomas Harte
52cf15c3e6
Attempts to route out modifier state.
2021-02-14 21:15:31 -05:00
Thomas Harte
a791680e6f
Implements set_status as per advice.
2021-02-14 21:04:20 -05:00
Thomas Harte
a3e98907ca
Removes temporary printf.
2021-02-14 21:03:54 -05:00
Thomas Harte
6e53b4c507
Corrects centralised ADB decoder.
...
I still think it's appropriate to do this in only a single place, given that using it is optional.
2021-02-14 20:41:05 -05:00
Thomas Harte
52c38e72f6
Starts seeking to automate register 3 handling.
...
Immediate pitfall: byte capture on the bus side isn't working correctly.
2021-02-14 20:37:33 -05:00
Thomas Harte
a51d143c35
Corrects reactive-device transmission logic.
...
Albeit that I'm still not properly responding to register 3 stuff, so the ADB bus needn't believe anything is out there. Also, without VSYNC being piped to the microcontroller it may well just not be polling anyway.
2021-02-14 18:54:22 -05:00
Thomas Harte
17e9305282
Starts adding a keyboard.
2021-02-13 23:16:45 -05:00
Thomas Harte
c284b34003
Resolves inability of ADB microcontroller to read its own ROM (!)
2021-02-13 17:53:40 -05:00
Thomas Harte
2ab3bba695
Attempts GLU register latching, restoring expected startup sequence.
2021-02-13 17:38:42 -05:00
Thomas Harte
2c4dcf8843
Edges towards implementing an ADB device.
2021-02-12 21:50:24 -05:00
Thomas Harte
ea40b2c982
Takes a stab at implementing device response.
2021-02-12 18:56:43 -05:00
Thomas Harte
adfdfa205f
Starts to establish the means by which I'll implement ADB devices.
2021-02-12 18:42:12 -05:00
Thomas Harte
e83b2120ce
Tidies up, allows Operations and AddressingModes to be posted directly to ostreams.
2021-02-10 21:46:56 -05:00
Thomas Harte
33abdc95aa
Adds a helper for decoding ADB commands.
...
Still very noticeably to do: any sort of standard part for devices to respond to the bus.
2021-02-10 21:39:33 -05:00
Thomas Harte
6ca8aa99fc
Commit SDL and Qt project files; improve commenting.
2021-02-10 21:28:32 -05:00
Thomas Harte
17bac4c8cf
Starts to formalise the ADB bus.
2021-02-10 21:24:31 -05:00
Thomas Harte
46bd20b5e0
Attempts to simplify ADB bit parsing.
...
On-line output still looks reasonable, albeit that the microcontroller suddenly seems to be interested in devices F and 3 rather than 2 and 3.
2021-02-08 22:08:49 -05:00
Thomas Harte
3c7f9a43ad
Merge branch 'AppleIIgs' of github.com:TomHarte/CLK into AppleIIgs
2021-02-08 18:43:27 -05:00
Thomas Harte
82312d3b59
Provide a more convincing version of port output.
2021-02-08 18:14:08 -05:00
Thomas Harte
93a80a30d3
With correct divider appears to get reset requests posted.
2021-02-07 23:05:01 -05:00
Thomas Harte
77b1efd176
Sets sensible 'reset' values.
2021-02-07 21:53:57 -05:00
Thomas Harte
acfab1dfb3
Starts to make some effort at timers.
2021-02-06 21:02:44 -05:00
Thomas Harte
819e9039ab
Corrects printed target address for ZeroPageRelative.
2021-02-04 20:54:31 -05:00
Thomas Harte
6526c645a5
Merge branch 'master' into AppleIIgs
2021-02-02 21:29:38 -05:00
Thomas Harte
3d2490b774
Merge pull request #869 from TomHarte/OricReads
...
Flips conditionals to ensure 65802 safety.
2021-02-02 21:03:08 -05:00
Thomas Harte
1e041f1adf
Flips conditionals to ensure 65802 safety.
2021-02-02 20:52:34 -05:00
Thomas Harte
4fdf01a1a8
Merge pull request #868 from TomHarte/ElectronSCSI
...
Adds Electron hard disk support.
2021-02-02 20:43:08 -05:00
Thomas Harte
beb514b231
Adds an additional mapping for copy.
2021-02-02 20:37:15 -05:00
