Thomas Harte
f60f1932f2
Restrict DIVU and DIVS tests to those which are well-defined.
2022-05-14 20:28:54 -04:00
Thomas Harte
7f704fdae1
Improve README.
2022-05-13 16:28:56 -04:00
Thomas Harte
dd63a6b61e
Correct all [A/S/N]BCD tests.
2022-05-13 16:18:58 -04:00
Thomas Harte
1935d968c5
Add ability to suggest solutions.
2022-05-13 15:27:11 -04:00
Thomas Harte
f83954f5b7
Switch to common bit-selection logic.
2022-05-13 15:08:15 -04:00
Thomas Harte
77b56c50e6
Ensure you can't trace into divide-by-zero, etc.
2022-05-13 14:02:56 -04:00
Thomas Harte
002a8c061f
Trim the public interface of Executor
.
2022-05-13 13:55:37 -04:00
Thomas Harte
4299334e24
Clean up some TODOs, eliminate one further conditional.
2022-05-13 11:17:57 -04:00
Thomas Harte
4d03c73222
Ensure that the first instruction of privilege/line1010/etc exceptions isn't traced.
2022-05-13 11:08:22 -04:00
Thomas Harte
84cfbaa0a4
Remove manual test count, now that all are being performed.
2022-05-13 11:00:26 -04:00
Thomas Harte
7a2fd93d08
Document BusHandler interface.
2022-05-13 10:59:36 -04:00
Thomas Harte
0d81992f6a
Move object creation.
2022-05-13 10:50:16 -04:00
Thomas Harte
5b67c9bf4a
MOVE to SR requires supervisor privileges.
2022-05-13 09:01:03 -04:00
Thomas Harte
6594b38567
Tidy up, and reduce for now to a summary report.
2022-05-13 08:02:20 -04:00
Thomas Harte
6c854e8ecc
Simplify is_supervisor
semantics.
2022-05-13 07:53:40 -04:00
Thomas Harte
2e796f31d4
Support interrupts; documentation to come.
2022-05-12 20:52:24 -04:00
Thomas Harte
3d8f5d4302
Improve failure logging.
...
This confirms that it's only the *BCDs and DIVU/DIVS in which I do not match the tests.
2022-05-12 20:23:32 -04:00
Thomas Harte
2fa6b2301b
Move string logic into Preinstruction
.
2022-05-12 19:46:08 -04:00
Thomas Harte
4ba20132b9
Avoid repeated allocations on the new path, reducing total runtime by almost two thirds.
2022-05-12 16:35:41 -04:00
Thomas Harte
a6e4d23c29
Tidy up primarily as per PatickvL's comments.
...
... though pulling the flag values out of an enum and into a namespace is entirely my own contribution, to keep them in their own namespace but having them overtly be ints.
2022-05-12 16:23:07 -04:00
Thomas Harte
6d43576db7
Remove errant semicolon.
2022-05-12 16:21:36 -04:00
Thomas Harte
b7d1bff0c7
Eliminate branches from ABCD.
2022-05-12 15:25:01 -04:00
Thomas Harte
79c5af755f
Eliminate branches from SBCD.
2022-05-12 15:18:03 -04:00
Thomas Harte
c6d84e7e60
Use Status::FlagT
pervasively.
2022-05-12 11:42:33 -04:00
Thomas Harte
192513656a
After much guesswork, fix SBCD and thereby pass flamewing tests.
2022-05-12 11:39:01 -04:00
Thomas Harte
41dc728c9b
Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform
2022-05-12 11:27:59 -04:00
Thomas Harte
f3c1b1f052
Name flags, remove closing underscores on exposed data fields.
2022-05-12 08:19:41 -04:00
Thomas Harte
bd61c72007
Mutate SBCD to correct values, though not yet statuses.
2022-05-12 07:22:26 -04:00
Thomas Harte
0efeea1294
Slightly improve SBCD. Not there yet though.
2022-05-12 07:07:21 -04:00
Thomas Harte
56ce1ec6e8
No need to subclass.
2022-05-11 21:25:38 -04:00
Thomas Harte
de168956e4
Fix tested operand order.
2022-05-11 16:44:39 -04:00
Thomas Harte
5b80844d81
Add a sanity test count, temporarily.
2022-05-11 16:34:28 -04:00
Thomas Harte
a9902fc817
Fix ABCD when the result has an invalid lower digit.
2022-05-11 16:31:27 -04:00
Thomas Harte
ed75688251
Fix capture of the initial zero flag.
2022-05-11 15:40:17 -04:00
Thomas Harte
17add4b585
Introduce and overwhelmingly fail the flamewing BCD tests.
2022-05-11 15:19:39 -04:00
Thomas Harte
d492156453
Add noreturn
attribute as a warning.
2022-05-11 10:51:48 -04:00
Thomas Harte
96af3d5ec5
Fix infinite inner/outer loop.
2022-05-11 10:26:12 -04:00
Thomas Harte
69ba14e34e
Support the trace flag.
2022-05-11 09:39:15 -04:00
Thomas Harte
943c924382
Add missing: MOVE to/from USP, RESET.
2022-05-11 07:52:23 -04:00
Thomas Harte
4b97427937
Remove further magic constants.
2022-05-11 07:00:35 -04:00
Thomas Harte
ab8e1fdcbf
Take a swing at access faults and address errors.
2022-05-10 16:20:30 -04:00
Thomas Harte
477979c275
Fully formulate and document the flow controller.
2022-05-10 10:34:07 -04:00
Thomas Harte
c635720a09
Tidy up; provide a notification for bit-change operations.
2022-05-10 08:23:25 -04:00
Thomas Harte
f2a6a12f79
Remove further vestiges of timing.
2022-05-09 20:58:51 -04:00
Thomas Harte
7445c617bc
Start removing 68000-specific timing calculations.
2022-05-09 20:32:02 -04:00
Thomas Harte
8e7340860e
Minor thematic rearrangement.
2022-05-09 16:35:17 -04:00
Thomas Harte
2ca1eb4cf8
Move set_pc
into the operation-specific group.
2022-05-09 16:20:15 -04:00
Thomas Harte
0af8660181
Remove add_pc
and decline_branch
in favour of operation-specific signals.
2022-05-09 16:19:25 -04:00
Thomas Harte
330ec1b848
TODO is done.
2022-05-09 11:52:33 -04:00
Thomas Harte
2f7cff84d9
Enable missing rotates and shifts.
2022-05-09 11:26:01 -04:00