21 Commits

Author	SHA1	Message	Date
Russell-S-Harper	8bbb5016cd	Was using up too many S registers, so moved internal functions to use new registers I0 - I7, added IEEE rounding to MUL and DIV, refactored to reduce size, and trimmed trailing spaces.	2018-08-21 09:14:16 -04:00
Russell-S-Harper	6dc8517120	Added MOD instruction. Some refactoring.	2018-08-19 10:01:59 -04:00
Russell-S-Harper	4c38ba57de	Setting result to largest value for true overflow.	2018-08-17 22:57:44 -04:00
Russell-S-Harper	6aad24a207	Adding DIV instruction.	2018-08-15 07:38:49 -04:00
Russell-S-Harper	248de8197a	Correcting typo.	2018-08-14 10:37:18 -04:00
Russell-S-Harper	ae0e509335	Adding MUL instruction.	2018-08-14 10:19:39 -04:00
Russell-S-Harper	61b9ce0b66	Adding EOL to files.	2018-08-13 21:23:05 -04:00
Russell-S-Harper	370363bdf9	Revising preprocessor commands.	2018-08-13 21:18:13 -04:00
Russell-S-Harper	c2ea029887	Revised comments.	2018-08-13 21:11:03 -04:00
Russell-S-Harper	3f7ed92537	Added ADD and SUB instructions. Also uncovered an issue with how negative numbers were represented.	2018-08-13 21:01:18 -04:00
Russell-S-Harper	d47c2615ab	Rounding of _SET_V result.	2018-08-13 08:49:48 -04:00
Russell-S-Harper	45b2efb2ca	Adding TST instruction.	2018-08-07 21:36:06 -04:00
Russell-S-Harper	c630c4ef6e	Formatting.	2018-08-07 20:28:59 -04:00
Russell-S-Harper	bb3b6cd683	Assigning PSH before POP.	2018-08-07 20:19:52 -04:00
Russell-S-Harper	fe7bfb12e6	Adding protection for PSH and POP.	2018-08-07 20:14:24 -04:00
Russell-S-Harper	a3069872b1	Revised comments.	2018-08-07 09:40:29 -04:00
Russell-S-Harper	41e1ff48d2	Revising INR and DCR to use common routines.	2018-08-07 09:30:11 -04:00
Russell-S-Harper	b96f42daaa	Renamed common-post-process to xa-pre-process.	2018-08-07 07:03:21 -04:00
Russell-S-Harper	421a7a192e	Revising Makefiles and expanding README.	2018-08-07 06:38:40 -04:00
Russell-S-Harper	954c695e0a	Revising comments.	2018-08-07 05:22:04 -04:00
Russell-S-Harper	6cfab34cfa	Add files via upload	2018-08-06 22:14:36 -04:00