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51 Commits 2 Branches 0 Tags 212 KiB
65267903c1
Commit Graph

34 Commits

Author SHA1 Message Date
Russell-S-Harper
65267903c1 Added comment regarding context switching. 2018-09-19 22:24:23 -04:00
Russell-S-Harper
f7ee11763b Added BRS and RTN instructions. 2018-09-17 20:35:19 -04:00
Russell-S-Harper
7ac0d7e04a Adding CMR instruction. 2018-09-14 06:24:35 -04:00
Russell-S-Harper
1c9358c7ee Fixing typos. 2018-09-11 20:48:56 -04:00
Russell-S-Harper
00302885d0 Adding all branch instructions (except BRS). 2018-09-11 20:40:28 -04:00
Russell-S-Harper
2d076b503c Adding SVD. 2018-09-11 19:26:08 -04:00
Russell-S-Harper
13c375b242 Added code for LDD. Removed some hard coded constants. 2018-09-08 11:00:19 -04:00
Russell-S-Harper
495eb811c8 Removing NEG and INV, and adding LDD and SVD. Also cleaned up INR and DCR. 2018-09-08 06:41:37 -04:00
Russell-S-Harper
794550eee5 Replacing DEC and HEX with NEG and INV. 2018-09-01 10:40:57 -04:00
Russell-S-Harper
800c51a6e1 Adding LDI and SVI instructions. 2018-08-30 16:37:37 -04:00
Russell-S-Harper
3af579e5bb Forcing regular 6502 instructions. 2018-08-27 20:27:00 -04:00
Russell-S-Harper
8f0a6ed542 Revised MOD to prevent overflow. 2018-08-24 23:40:47 -04:00
Russell-S-Harper
18b7c46878 Revised comments. 2018-08-21 09:33:12 -04:00
Russell-S-Harper
8bbb5016cd Was using up too many S registers, so moved internal functions to use new registers I0 - I7, added IEEE rounding to MUL and DIV, refactored to reduce size, and trimmed trailing spaces. 2018-08-21 09:14:16 -04:00
Russell-S-Harper
6dc8517120 Added MOD instruction. Some refactoring. 2018-08-19 10:01:59 -04:00
Russell-S-Harper
4c38ba57de Setting result to largest value for true overflow. 2018-08-17 22:57:44 -04:00
Russell-S-Harper
6aad24a207 Adding DIV instruction. 2018-08-15 07:38:49 -04:00
Russell-S-Harper
248de8197a Correcting typo. 2018-08-14 10:37:18 -04:00
Russell-S-Harper
ae0e509335 Adding MUL instruction. 2018-08-14 10:19:39 -04:00
Russell-S-Harper
61b9ce0b66 Adding EOL to files. 2018-08-13 21:23:05 -04:00
Russell-S-Harper
370363bdf9 Revising preprocessor commands. 2018-08-13 21:18:13 -04:00
Russell-S-Harper
c2ea029887 Revised comments. 2018-08-13 21:11:03 -04:00
Russell-S-Harper
3f7ed92537 Added ADD and SUB instructions. Also uncovered an issue with how negative numbers were represented. 2018-08-13 21:01:18 -04:00
Russell-S-Harper
d47c2615ab Rounding of _SET_V result. 2018-08-13 08:49:48 -04:00
Russell-S-Harper
45b2efb2ca Adding TST instruction. 2018-08-07 21:36:06 -04:00
Russell-S-Harper
c630c4ef6e Formatting. 2018-08-07 20:28:59 -04:00
Russell-S-Harper
bb3b6cd683 Assigning PSH before POP. 2018-08-07 20:19:52 -04:00
Russell-S-Harper
fe7bfb12e6 Adding protection for PSH and POP. 2018-08-07 20:14:24 -04:00
Russell-S-Harper
a3069872b1 Revised comments. 2018-08-07 09:40:29 -04:00
Russell-S-Harper
41e1ff48d2 Revising INR and DCR to use common routines. 2018-08-07 09:30:11 -04:00
Russell-S-Harper
b96f42daaa Renamed common-post-process to xa-pre-process. 2018-08-07 07:03:21 -04:00
Russell-S-Harper
421a7a192e Revising Makefiles and expanding README. 2018-08-07 06:38:40 -04:00
Russell-S-Harper
954c695e0a Revising comments. 2018-08-07 05:22:04 -04:00
Russell-S-Harper
6cfab34cfa
Add files via upload 2018-08-06 22:14:36 -04:00