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Addressing mode simplifications

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This commit is contained in:
Adrian Conlon 2024-03-14 14:54:52 +00:00
parent 33a0889fe1
commit b22d7e47e5
14 changed files with 108 additions and 124 deletions

2
Intel8080/inc/Intel8080.h

@ -32,7 +32,7 @@ namespace EightBit {
Signal<Intel8080> ExecutingInstruction;
Signal<Intel8080> ExecutedInstruction;
int execute() noexcept final;
void execute() noexcept final;
int step() noexcept final;
[[nodiscard]] const register16_t& AF() const noexcept final;

6
Intel8080/src/Intel8080.cpp

@ -325,10 +325,11 @@ int EightBit::Intel8080::step() noexcept {
}
}
ExecutedInstruction.fire(*this);
ASSUME(cycles() > 0);
return cycles();
}
int EightBit::Intel8080::execute() noexcept {
void EightBit::Intel8080::execute() noexcept {
const auto& decoded = getDecodedOpcode(opcode());
@ -340,9 +341,6 @@ int EightBit::Intel8080::execute() noexcept {
const auto q = decoded.q;
execute(x, y, z, p, q);
ASSUME(cycles() > 0);
return cycles();
}
void EightBit::Intel8080::execute(const int x, const int y, const int z, const int p, const int q) {

2
LR35902/inc/LR35902.h

@ -47,7 +47,7 @@ namespace EightBit {
void tickMachine() { tick(4); MachineTicked.fire(); }
protected:
int execute() noexcept final;
void execute() noexcept final;
int step() noexcept final;
void handleRESET() noexcept final;

7
LR35902/src/LR35902.cpp

@ -466,11 +466,12 @@ int EightBit::GameBoy::LR35902::step() noexcept {
}
}
ExecutedInstruction.fire(*this);
assert(cycles() > 0);
assert(cycles() % 4 == 0);
return cycles();
}
int EightBit::GameBoy::LR35902::execute() noexcept {
void EightBit::GameBoy::LR35902::execute() noexcept {
const auto& decoded = getDecodedOpcode(opcode());
@ -485,10 +486,6 @@ int EightBit::GameBoy::LR35902::execute() noexcept {
executeOther(x, y, z, p, q);
else
executeCB(x, y, z, p, q);
assert(cycles() > 0);
return cycles();
}
void EightBit::GameBoy::LR35902::executeCB(const int x, const int y, const int z, int, int) {

72
M6502/inc/mos6502.h

@ -38,7 +38,7 @@ namespace EightBit {
Signal<MOS6502> ExecutingInstruction;
Signal<MOS6502> ExecutedInstruction;
int execute() noexcept final;
void execute() noexcept final;
[[nodiscard]] int step() noexcept final;
[[nodiscard]] constexpr auto& X() noexcept { return m_x; }
@ -58,19 +58,19 @@ namespace EightBit {
// Instructions with BCD effects
[[nodiscard]] virtual uint8_t sub(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
[[nodiscard]] virtual uint8_t sub(uint8_t operand, int borrow = 0) noexcept;
[[nodiscard]] void sbc() noexcept;
[[nodiscard]] uint8_t sub_b(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
[[nodiscard]] uint8_t sub_d(uint8_t operand, uint8_t data, int borrow = 0) noexcept;
[[nodiscard]] virtual uint8_t add(uint8_t operand, uint8_t data, int carry = 0) noexcept;
[[nodiscard]] virtual uint8_t add(uint8_t operand, int carry = 0) noexcept;
[[nodiscard]] void adc() noexcept;
[[nodiscard]] uint8_t add_b(uint8_t operand, uint8_t data, int carry) noexcept;
[[nodiscard]] uint8_t add_d(uint8_t operand, uint8_t data, int carry) noexcept;
// Undocumented compound instructions (with BCD effects)
virtual void arr(uint8_t value) noexcept;
virtual void arr() noexcept;
virtual void arr_b(uint8_t value) noexcept;
virtual void arr_d(uint8_t value) noexcept;
@ -112,35 +112,23 @@ namespace EightBit {
[[nodiscard]] register16_t Address_Indirect() noexcept;
[[nodiscard]] register16_t Address_ZeroPageX() noexcept;
[[nodiscard]] register16_t Address_ZeroPageY() noexcept;
[[nodiscard]] std::pair<register16_t, uint8_t> Address_AbsoluteX() noexcept;
[[nodiscard]] std::pair<register16_t, uint8_t> Address_AbsoluteY() noexcept;
[[nodiscard]] register16_t Address_AbsoluteX() noexcept;
[[nodiscard]] register16_t Address_AbsoluteY() noexcept;
[[nodiscard]] register16_t Address_IndexedIndirectX() noexcept;
[[nodiscard]] std::pair<register16_t, uint8_t> Address_IndirectIndexedY() noexcept;
[[nodiscard]] register16_t Address_IndirectIndexedY() noexcept;
[[nodiscard]] register16_t Address_relative_byte() noexcept;
// Addressing modes, read
auto AM_Immediate() noexcept { return memoryRead(Address_Immediate()); }
auto AM_Absolute() noexcept { return memoryRead(Address_Absolute()); }
auto AM_ZeroPage() noexcept { return memoryRead(Address_ZeroPage()); }
auto AM_ZeroPageX() noexcept { return memoryRead(Address_ZeroPageX()); }
auto AM_ZeroPageY() noexcept { return memoryRead(Address_ZeroPageY()); }
auto AM_IndexedIndirectX() noexcept { return memoryRead(Address_IndexedIndirectX()); }
auto AM_AbsoluteX() noexcept {
maybe_fixup(Address_AbsoluteX());
return memoryRead();
}
auto AM_AbsoluteY() noexcept {
maybe_fixup(Address_AbsoluteY());
return memoryRead();
}
auto AM_IndirectIndexedY() noexcept {
maybe_fixup(Address_IndirectIndexedY());
return memoryRead();
}
void AM_Immediate() noexcept { memoryRead(Address_Immediate()); }
void AM_Absolute() noexcept { memoryRead(Address_Absolute()); }
void AM_ZeroPage() noexcept { memoryRead(Address_ZeroPage()); }
void AM_ZeroPageX() noexcept { memoryRead(Address_ZeroPageX()); }
void AM_ZeroPageY() noexcept { memoryRead(Address_ZeroPageY()); }
void AM_IndexedIndirectX() noexcept { memoryRead(Address_IndexedIndirectX()); }
void AM_AbsoluteX() noexcept { maybe_fixup(Address_AbsoluteX()); memoryRead(); }
void AM_AbsoluteY() noexcept { maybe_fixup(Address_AbsoluteY()); memoryRead(); }
void AM_IndirectIndexedY() noexcept { maybe_fixup(Address_IndirectIndexedY()); memoryRead(); }
// Flag checking
@ -206,34 +194,28 @@ namespace EightBit {
memoryWrite(result); \
}
void maybe_fixup(register16_t address, uint8_t unfixed_page) noexcept {
BUS().ADDRESS() = { address.low, unfixed_page };
if (unfixed_page != address.high) {
void maybe_fixup(register16_t address) noexcept {
BUS().ADDRESS() = { address.low, m_unfixed_page };
if (m_unfixed_page != address.high) {
memoryRead();
BUS().ADDRESS().high = address.high;
}
}
void maybe_fixup(std::pair<register16_t, uint8_t> fixing) noexcept {
maybe_fixup(fixing.first, fixing.second);
}
void fixup(register16_t address, uint8_t unfixed_page) noexcept {
BUS().ADDRESS() = { address.low, unfixed_page };
void fixup(register16_t address) noexcept {
BUS().ADDRESS() = { address.low, m_unfixed_page };
memoryRead();
BUS().ADDRESS().high = address.high;
}
void fixup(std::pair<register16_t, uint8_t> fixing) noexcept {
fixup(fixing.first, fixing.second);
}
// Status flag operations
constexpr void set_flag(int which, int condition) noexcept { P() = setBit(P(), which, condition); }
constexpr static void set_flag(uint8_t& f, int which, int condition) noexcept { f = setBit(f, which, condition); }
constexpr void set_flag(int which, int condition) noexcept { set_flag(P(), which, condition); }
constexpr void set_flag(int which) noexcept { P() = setBit(P(), which); }
constexpr void reset_flag(int which, int condition) noexcept { P() = clearBit(P(), which, condition); }
constexpr static void reset_flag(uint8_t& f, int which, int condition) noexcept { f = clearBit(f, which, condition); }
constexpr void reset_flag(int which, int condition) noexcept { reset_flag(P(), which, condition); }
constexpr void reset_flag(int which) noexcept { P() = clearBit(P(), which); }
// Chew up a cycle
@ -244,7 +226,7 @@ namespace EightBit {
// Instruction implementations
void andr() noexcept;
void bit(uint8_t operand, uint8_t data) noexcept;
void bit(uint8_t operand) noexcept;
void cmp(uint8_t first) noexcept;
[[nodiscard]] uint8_t dec(uint8_t value) noexcept;
void eorr() noexcept;
@ -311,5 +293,7 @@ namespace EightBit {
bool m_handlingRESET = false;
bool m_handlingNMI = false;
bool m_handlingINT = false;
uint8_t m_unfixed_page = 0;
};
}

104
M6502/src/mos6502.cpp

@ -60,6 +60,7 @@ int EightBit::MOS6502::step() noexcept {
}
ExecutedInstruction.fire(*this);
ASSUME(cycles() > 0);
return cycles();
}
@ -125,7 +126,7 @@ uint8_t EightBit::MOS6502::busRead() noexcept {
//
int EightBit::MOS6502::execute() noexcept {
void EightBit::MOS6502::execute() noexcept {
switch (opcode()) {
@ -167,7 +168,7 @@ int EightBit::MOS6502::execute() noexcept {
case 0x21: AM_IndexedIndirectX(); andr(); break; // AND (indexed indirect X)
case 0x22: jam(); break; // *JAM
case 0x23: RMW(Address_IndexedIndirectX, rol); andr(); break; // *RLA (indexed indirect X)
case 0x24: bit(A(), AM_ZeroPage()); break; // BIT (zero page)
case 0x24: AM_ZeroPage(); bit(A()); break; // BIT (zero page)
case 0x25: AM_ZeroPage(); andr(); break; // AND (zero page)
case 0x26: RMW(Address_ZeroPage, rol); break; // ROL (zero page)
case 0x27: Processor::execute(0x26); andr(); break; // *RLA (zero page)
@ -175,7 +176,7 @@ int EightBit::MOS6502::execute() noexcept {
case 0x29: AM_Immediate(); andr(); break; // AND (immediate)
case 0x2a: swallow(); A() = rol(A()); break; // ROL A (implied)
case 0x2b: AM_Immediate(); anc(); break; // *ANC (immediate)
case 0x2c: bit(A(), AM_Absolute()); break; // BIT (absolute)
case 0x2c: AM_Absolute(); bit(A()); break; // BIT (absolute)
case 0x2d: AM_Absolute(); andr(); break; // AND (absolute)
case 0x2e: RMW(Address_Absolute, rol); break; // ROL (absolute)
case 0x2f: Processor::execute(0x2e); andr(); break; // *RLA (absolute)
@ -242,7 +243,7 @@ int EightBit::MOS6502::execute() noexcept {
case 0x68: swallow(); swallow_stack(); A() = through(pop()); break; // PLA (implied)
case 0x69: AM_Immediate(); adc(); break; // ADC (immediate)
case 0x6a: swallow(); A() = ror(A()); break; // ROR A (implied)
case 0x6b: arr(AM_Immediate()); break; // *ARR (immediate)
case 0x6b: AM_Immediate(); arr(); break; // *ARR (immediate)
case 0x6c: jump(Address_Indirect()); break; // JMP (indirect)
case 0x6d: AM_Absolute(); adc(); break; // ADC (absolute)
case 0x6e: RMW(Address_Absolute, ror); break; // ROR (absolute)
@ -276,7 +277,8 @@ int EightBit::MOS6502::execute() noexcept {
case 0x88: swallow(); Y() = dec(Y()); break; // DEY (implied)
case 0x89: AM_Immediate(); break; // *NOP (immediate)
case 0x8a: swallow(); A() = through(X()); break; // TXA (implied)
case 0x8b: A() = through((A() | 0xee) & X() & AM_Immediate()); break; // *ANE (immediate)
case 0x8b: AM_Immediate(); A() = through((A() | 0xee) & X() & BUS().DATA());
break; // *ANE (immediate)
case 0x8c: memoryWrite(Address_Absolute(), Y()); break; // STY (absolute)
case 0x8d: memoryWrite(Address_Absolute(), A()); break; // STA (absolute)
case 0x8e: memoryWrite(Address_Absolute(), X()); break; // STX (absolute)
@ -299,39 +301,40 @@ int EightBit::MOS6502::execute() noexcept {
case 0x9e: sxa_AbsoluteY(); break; // *SXA (absolute, Y)
case 0x9f: sha_AbsoluteY(); break; // *SHA (absolute, Y)
case 0xa0: Y() = through(AM_Immediate()); break; // LDY (immediate)
case 0xa1: A() = through(AM_IndexedIndirectX()); break; // LDA (indexed indirect X)
case 0xa2: X() = through(AM_Immediate()); break; // LDX (immediate)
case 0xa3: A() = X() = through(AM_IndexedIndirectX()); break; // *LAX (indexed indirect X)
case 0xa4: Y() = through(AM_ZeroPage()); break; // LDY (zero page)
case 0xa5: A() = through(AM_ZeroPage()); break; // LDA (zero page)
case 0xa6: X() = through(AM_ZeroPage()); break; // LDX (zero page)
case 0xa7: A() = X() = through(AM_ZeroPage()); break; // *LAX (zero page)
case 0xa0: AM_Immediate(); Y() = through(BUS().DATA()); break; // LDY (immediate)
case 0xa1: AM_IndexedIndirectX(); A() = through(BUS().DATA()); break; // LDA (indexed indirect X)
case 0xa2: AM_Immediate(); X() = through(BUS().DATA()); break; // LDX (immediate)
case 0xa3: AM_IndexedIndirectX(); A() = X() = through(BUS().DATA()); break; // *LAX (indexed indirect X)
case 0xa4: AM_ZeroPage(); Y() = through(BUS().DATA()); break; // LDY (zero page)
case 0xa5: AM_ZeroPage(); A() = through(BUS().DATA()); break; // LDA (zero page)
case 0xa6: AM_ZeroPage(); X() = through(BUS().DATA()); break; // LDX (zero page)
case 0xa7: AM_ZeroPage(); A() = X() = through(BUS().DATA()); break; // *LAX (zero page)
case 0xa8: swallow(); Y() = through(A()); break; // TAY (implied)
case 0xa9: A() = through(AM_Immediate()); break; // LDA (immediate)
case 0xa9: AM_Immediate(); A() = through(BUS().DATA()); break; // LDA (immediate)
case 0xaa: swallow(); X() = through(A()); break; // TAX (implied)
case 0xab: A() = X() = through((A() | 0xee) & AM_Immediate()); break; // *ATX (immediate)
case 0xac: Y() = through(AM_Absolute()); break; // LDY (absolute)
case 0xad: A() = through(AM_Absolute()); break; // LDA (absolute)
case 0xae: X() = through(AM_Absolute()); break; // LDX (absolute)
case 0xaf: A() = X() = through(AM_Absolute()); break; // *LAX (absolute)
case 0xab: AM_Immediate(); A() = X() = through((A() | 0xee) & BUS().DATA());
break; // *ATX (immediate)
case 0xac: AM_Absolute(); Y() = through(BUS().DATA()); break; // LDY (absolute)
case 0xad: AM_Absolute(); A() = through(BUS().DATA()); break; // LDA (absolute)
case 0xae: AM_Absolute(); X() = through(BUS().DATA()); break; // LDX (absolute)
case 0xaf: AM_Absolute(); A() = X() = through(BUS().DATA()); break; // *LAX (absolute)
case 0xb0: branch(carry()); break; // BCS (relative)
case 0xb1: A() = through(AM_IndirectIndexedY()); break; // LDA (indirect indexed Y)
case 0xb1: AM_IndirectIndexedY(); A() = through(BUS().DATA()); break; // LDA (indirect indexed Y)
case 0xb2: jam(); break; // *JAM
case 0xb3: A() = X() = through(AM_IndirectIndexedY()); break; // *LAX (indirect indexed Y)
case 0xb4: Y() = through(AM_ZeroPageX()); break; // LDY (zero page, X)
case 0xb5: A() = through(AM_ZeroPageX()); break; // LDA (zero page, X)
case 0xb6: X() = through(AM_ZeroPageY()); break; // LDX (zero page, Y)
case 0xb7: A() = X() = through(AM_ZeroPageY()); break; // *LAX (zero page, Y)
case 0xb3: AM_IndirectIndexedY(); A() = X() = through(BUS().DATA()); break; // *LAX (indirect indexed Y)
case 0xb4: AM_ZeroPageX(); Y() = through(BUS().DATA()); break; // LDY (zero page, X)
case 0xb5: AM_ZeroPageX(); A() = through(BUS().DATA()); break; // LDA (zero page, X)
case 0xb6: AM_ZeroPageY(); X() = through(BUS().DATA()); break; // LDX (zero page, Y)
case 0xb7: AM_ZeroPageY(); A() = X() = through(BUS().DATA()); break; // *LAX (zero page, Y)
case 0xb8: swallow(); reset_flag(VF); break; // CLV (implied)
case 0xb9: A() = through(AM_AbsoluteY()); break; // LDA (absolute, Y)
case 0xb9: AM_AbsoluteY(); A() = through(BUS().DATA()); break; // LDA (absolute, Y)
case 0xba: swallow(); X() = through(S()); break; // TSX (implied)
case 0xbb: las_AbsoluteY(); break; // *LAS (absolute, Y)
case 0xbc: Y() = through(AM_AbsoluteX()); break; // LDY (absolute, X)
case 0xbd: A() = through(AM_AbsoluteX()); break; // LDA (absolute, X)
case 0xbe: X() = through(AM_AbsoluteY()); break; // LDX (absolute, Y)
case 0xbf: A() = X() = through(AM_AbsoluteY()); break; // *LAX (absolute, Y)
case 0xbc: AM_AbsoluteX(); Y() = through(BUS().DATA()); break; // LDY (absolute, X)
case 0xbd: AM_AbsoluteX(); A() = through(BUS().DATA()); break; // LDA (absolute, X)
case 0xbe: AM_AbsoluteY(); X() = through(BUS().DATA()); break; // LDX (absolute, Y)
case 0xbf: AM_AbsoluteY(); A() = X() = through(BUS().DATA()); break; // *LAX (absolute, Y)
case 0xc0: AM_Immediate(); cmp(Y()); break; // CPY (immediate)
case 0xc1: AM_IndexedIndirectX(); cmp(A()); break; // CMP (indexed indirect X)
@ -401,9 +404,6 @@ int EightBit::MOS6502::execute() noexcept {
case 0xfe: FIXUP_RMW(Address_AbsoluteX, inc); break; // INC (absolute, X)
case 0xff: Processor::execute(0xfe); sbc(); break; // *ISB (absolute, X)
}
ASSUME(cycles() > 0);
return cycles();
}
////
@ -443,23 +443,26 @@ EightBit::register16_t EightBit::MOS6502::Address_ZeroPageY() noexcept {
return register16_t(BUS().ADDRESS().low + Y(), 0);
}
std::pair<EightBit::register16_t, uint8_t> EightBit::MOS6502::Address_AbsoluteX() noexcept {
EightBit::register16_t EightBit::MOS6502::Address_AbsoluteX() noexcept {
const auto address = Address_Absolute();
return { address + X(), address.high };
m_unfixed_page = address.high;
return address + X();
}
std::pair<EightBit::register16_t, uint8_t> EightBit::MOS6502::Address_AbsoluteY() noexcept {
EightBit::register16_t EightBit::MOS6502::Address_AbsoluteY() noexcept {
const auto address = Address_Absolute();
return { address + Y(), address.high };
m_unfixed_page = address.high;
return address + Y();
}
EightBit::register16_t EightBit::MOS6502::Address_IndexedIndirectX() noexcept {
return Processor::getWordPaged(Address_ZeroPageX());
}
std::pair<EightBit::register16_t, uint8_t> EightBit::MOS6502::Address_IndirectIndexedY() noexcept {
EightBit::register16_t EightBit::MOS6502::Address_IndirectIndexedY() noexcept {
const auto address = Address_ZeroPageIndirect();
return { address + Y(), address.high };
m_unfixed_page = address.high;
return address + Y();
}
EightBit::register16_t EightBit::MOS6502::Address_relative_byte() noexcept {
@ -472,9 +475,9 @@ void EightBit::MOS6502::branch(const int condition) noexcept {
const auto destination = Address_relative_byte();
if (condition) {
swallow();
const auto page = PC().high;
m_unfixed_page = PC().high;
jump(destination);
maybe_fixup(PC(), page);
maybe_fixup(PC());
}
}
@ -483,16 +486,16 @@ void EightBit::MOS6502::branch(const int condition) noexcept {
void EightBit::MOS6502::sbc() noexcept {
const auto operand = A();
const auto data = BUS().DATA();
A() = sub(operand, data, carry(~P()));
A() = sub(operand, carry(~P()));
const auto difference = m_intermediate;
adjustNZ(difference.low);
adjustOverflow_subtract(operand, data, difference.low);
adjustOverflow_subtract(operand, BUS().DATA(), difference.low);
reset_flag(CF, difference.high);
}
uint8_t EightBit::MOS6502::sub(const uint8_t operand, const uint8_t data, const int borrow) noexcept {
uint8_t EightBit::MOS6502::sub(const uint8_t operand, const int borrow) noexcept {
const auto data = BUS().DATA();
return decimal() ? sub_d(operand, data, borrow) : sub_b(operand, data, borrow);
}
@ -518,10 +521,11 @@ uint8_t EightBit::MOS6502::sub_d(const uint8_t operand, const uint8_t data, cons
}
void EightBit::MOS6502::adc() noexcept {
A() = add(A(), BUS().DATA(), carry());
A() = add(A(), carry());
}
uint8_t EightBit::MOS6502::add(uint8_t operand, uint8_t data, int carrying) noexcept {
uint8_t EightBit::MOS6502::add(uint8_t operand, int carrying) noexcept {
const auto data = BUS().DATA();
return decimal() ? add_d(operand, data, carrying) : add_b(operand, data, carrying);
}
@ -563,7 +567,8 @@ void EightBit::MOS6502::andr() noexcept {
A() = through(A() & BUS().DATA());
}
void EightBit::MOS6502::bit(const uint8_t operand, const uint8_t data) noexcept {
void EightBit::MOS6502::bit(const uint8_t operand) noexcept {
const auto data = BUS().DATA();
set_flag(VF, overflow(data));
adjustZero(operand & data);
adjustNegative(data);
@ -627,7 +632,8 @@ void EightBit::MOS6502::anc() noexcept {
set_flag(CF, A() & Bit7);
}
void EightBit::MOS6502::arr(const uint8_t value) noexcept {
void EightBit::MOS6502::arr() noexcept {
const auto value = BUS().DATA();
decimal() ? arr_d(value) : arr_b(value);
}

2
MC6809/inc/mc6809.h

@ -66,7 +66,7 @@ namespace EightBit {
Signal<mc6809> ExecutingInstruction;
Signal<mc6809> ExecutedInstruction;
int execute() noexcept final;
void execute() noexcept final;
[[nodiscard]] int step() noexcept final;
[[nodiscard]] constexpr auto& D() noexcept { return m_d; }

5
MC6809/src/mc6809.cpp

@ -39,6 +39,7 @@ int EightBit::mc6809::step() noexcept {
Processor::execute(fetchByte());
}
ExecutedInstruction.fire(*this);
assert(cycles() > 0);
return cycles();
}
@ -139,7 +140,7 @@ void EightBit::mc6809::ret() noexcept {
//
int EightBit::mc6809::execute() noexcept {
void EightBit::mc6809::execute() noexcept {
lowerBA();
lowerBS();
const bool prefixed = m_prefix10 || m_prefix11;
@ -152,8 +153,6 @@ int EightBit::mc6809::execute() noexcept {
else
execute11();
}
assert(cycles() > 0);
return cycles();
}
void EightBit::mc6809::executeUnprefixed() {

4
Ricoh2A03/inc/Ricoh2A03.h

@ -11,7 +11,7 @@ namespace EightBit {
virtual ~Ricoh2A03() = default;
protected:
virtual uint8_t sub(uint8_t operand, uint8_t data, int borrow) noexcept final;
virtual uint8_t add(uint8_t operand, uint8_t data, int carry) noexcept final;
virtual uint8_t sub(uint8_t operand, int borrow) noexcept final;
virtual uint8_t add(uint8_t operand, int carry) noexcept final;
};
}

6
Ricoh2A03/src/Ricoh2A03.cpp

@ -5,10 +5,12 @@ EightBit::Ricoh2A03::Ricoh2A03(Bus& bus)
: MOS6502(bus) {
}
uint8_t EightBit::Ricoh2A03::sub(uint8_t operand, uint8_t data, int borrow) noexcept {
uint8_t EightBit::Ricoh2A03::sub(uint8_t operand, int borrow) noexcept {
const auto data = BUS().DATA();
return MOS6502::sub_b(operand ,data, borrow);
}
uint8_t EightBit::Ricoh2A03::add(uint8_t operand, uint8_t data, int carry) noexcept {
uint8_t EightBit::Ricoh2A03::add(uint8_t operand, int carry) noexcept {
const auto data = BUS().DATA();
return MOS6502::add_b(operand, data, carry);
}

2
Z80/inc/Z80.h

@ -89,7 +89,7 @@ namespace EightBit {
Signal<EventArgs> WritingIO;
Signal<EventArgs> WrittenIO;
int execute() noexcept final;
void execute() noexcept final;
int step() noexcept final;
[[nodiscard]] const register16_t& AF() const noexcept final;

12
Z80/src/Z80.cpp

@ -601,9 +601,9 @@ uint8_t EightBit::Z80::fetchOpCode() noexcept {
const auto halted = lowered(HALT());
returned = IntelProcessor::memoryRead(PC());
if (UNLIKELY(halted))
returned = 0; // NOP
else
PC()++;
returned = 0; // NOP
else
PC()++;
}
BUS().ADDRESS() = { REFRESH(), IV() };
{
@ -778,10 +778,11 @@ int EightBit::Z80::step() noexcept {
IntelProcessor::execute(fetchOpCode());
}
ExecutedInstruction.fire(*this);
ASSUME(cycles() > 0);
return cycles();
}
int EightBit::Z80::execute() noexcept {
void EightBit::Z80::execute() noexcept {
const auto& decoded = getDecodedOpcode(opcode());
@ -798,9 +799,6 @@ int EightBit::Z80::execute() noexcept {
executeED(x, y, z, p, q);
else
executeOther(x, y, z, p, q);
ASSUME(cycles() > 0);
return cycles();
}
void EightBit::Z80::executeCB(const int x, const int y, const int z) noexcept {

4
inc/Processor.h

@ -29,8 +29,8 @@ namespace EightBit {
int run(int limit) noexcept;
virtual int step() noexcept = 0;
virtual int execute() noexcept = 0;
int execute(uint8_t value) noexcept;
virtual void execute() noexcept = 0;
void execute(uint8_t value) noexcept;
[[nodiscard]] virtual register16_t peekWord(register16_t address) noexcept = 0;
virtual void pokeWord(register16_t address, register16_t value) noexcept = 0;

4
src/Processor.cpp

@ -109,9 +109,9 @@ int EightBit::Processor::run(const int limit) noexcept {
return current;
}
int EightBit::Processor::execute(const uint8_t value) noexcept {
void EightBit::Processor::execute(const uint8_t value) noexcept {
opcode() = value;
return execute();
execute();
}
void EightBit::Processor::jump(const register16_t destination) noexcept {