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https://github.com/MoleskiCoder/EightBit.git
synced 2026-10-22 07:02:37 +00:00
Fixes 8080 implmentation so tests run. Cycle counts wrong though
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683fc0e878
commit
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2 files changed
+37
-15
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@@ -125,7 +125,7 @@ namespace EightBit {
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}
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[[nodiscard]] static constexpr auto adjustAuxiliaryCarrySub(uint8_t f, uint8_t before, uint8_t value, int calculation) noexcept {
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return setBit(f, AC, calculateHalfCarrySub(before, value, calculation));
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return clearBit(f, AC, calculateHalfCarrySub(before, value, calculation));
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}
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void adjustAuxiliaryCarrySub(uint8_t before, uint8_t value, int calculation) noexcept {
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+36
-14
@@ -60,6 +60,7 @@ void EightBit::Intel8080::memoryUpdate(int ticks) noexcept {
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void EightBit::Intel8080::handleRESET() noexcept {
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IntelProcessor::handleRESET();
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disableInterrupts();
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SP() = AF() = Mask16;
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}
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void EightBit::Intel8080::handleINT() noexcept {
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@@ -302,7 +303,7 @@ void EightBit::Intel8080::xhtl(register16_t& exchange) {
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BUS().DATA() = exchange.low;
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exchange.low = MEMPTR().low;
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memoryUpdate();
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tick(2);
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tick(15); // 2(memUpdate) + 1(memUpdate) + 15 = 18 total
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}
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void EightBit::Intel8080::writePort(const uint8_t port) noexcept {
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@@ -454,21 +455,23 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
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case 4: { // 8-bit INC
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auto operand = R(y);
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IntelProcessor::R(y, increment(operand));
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tick(4);
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tick(5);
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if (UNLIKELY(y == 6)) // INC M: memRead(0) + memUpdate(1) + 5 + 4 = 10
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tick(4);
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break;
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} case 5: { // 8-bit DEC
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auto operand = R(y);
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IntelProcessor::R(y, decrement(operand));
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tick(4);
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if (UNLIKELY(y == 6))
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tick(7);
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tick(5);
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if (UNLIKELY(y == 6)) // DEC M: memRead(0) + memUpdate(1) + 5 + 4 = 10
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tick(4);
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break;
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} case 6: // 8-bit load immediate
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fetchByte();
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IntelProcessor::R(y, BUS().DATA());
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tick(7);
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if (UNLIKELY(y == 6))
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tick(3);
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if (UNLIKELY(y == 6)) // LD M,n: memUpdate(1) + 7 + 2 = 10
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tick(2);
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break;
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case 7: // Assorted operations on accumulator/flags
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switch (y) {
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@@ -508,12 +511,15 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
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case 1: // 8-bit loading
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if (UNLIKELY(z == 6 && y == 6)) { // Exception (replaces LD (HL), (HL))
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lowerHALT();
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tick(4);
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} else {
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IntelProcessor::R(y, R(z));
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if (UNLIKELY((y == 6) || (z == 6))) // M operations
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tick(3);
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tick(5);
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if (UNLIKELY(y == 6)) // MOV M,r: memUpdate(1) + 5 + 1 = 7
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tick(1);
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else if (UNLIKELY(z == 6)) // MOV r,M: memRead(0) + 5 + 2 = 7
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tick(2);
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}
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tick(4);
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break;
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case 2: { // Operate on accumulator and register/memory location
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const auto value = R(z);
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@@ -576,10 +582,11 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
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break;
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case 2: // JP HL
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Processor::jump(HL());
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tick(5);
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break;
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case 3: // LD SP,HL
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SP() = HL();
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tick(4);
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tick(5);
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break;
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}
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break;
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@@ -589,40 +596,54 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
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break;
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case 2: // Conditional jump
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jumpConditionalFlag(y);
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tick(10);
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break;
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case 3: // Assorted operations
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switch (y) {
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case 0: // JP nn
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fetchInto(MEMPTR());
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jump();
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tick(10);
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break;
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case 2: // OUT (n),A
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fetchByte();
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writePort(BUS().DATA());
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tick(10);
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break;
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case 3: // IN A,(n)
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fetchByte();
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readPort(BUS().DATA());
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A() = BUS().DATA();
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tick(11);
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tick(10);
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break;
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case 4: // EX (SP),HL
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xhtl(HL());
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break;
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case 5: // EX DE,HL
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std::swap(DE(), HL());
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tick(5);
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break;
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case 6: // DI
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disableInterrupts();
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tick(4);
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break;
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case 7: // EI
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enableInterrupts();
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tick(4);
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break;
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}
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break;
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case 4: // Conditional call: CALL cc[y], nn
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callConditionalFlag(y);
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case 4: { // Conditional call: CALL cc[y], nn
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const bool condition = convertCondition(y);
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fetchInto(MEMPTR());
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if (condition) {
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call();
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tick(17);
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} else {
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tick(11);
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}
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break;
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}
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case 5: // PUSH & various ops
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switch (q) {
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case 0: // PUSH rp2[p]
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@@ -672,6 +693,7 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
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default:
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UNREACHABLE;
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}
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tick(7);
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break;
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}
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case 7: // Restart: RST y * 8
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