Adrian Conlon
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5e9014997a
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Upgraded to VS2019, default SDK.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-08-06 13:16:38 +01:00 |
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Adrian Conlon
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def1c58e9d
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Tidy project settings across the EightBit library to be more consistent.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-07-06 22:45:16 +01:00 |
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Adrian Conlon
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8f0dbe0dbc
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i8080: Small board level source layout change, no functional effect
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-05-05 10:26:36 +01:00 |
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Adrian Conlon
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1a0d3ad77a
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Go through all projects for configuration consistency.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-05-05 10:25:44 +01:00 |
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Adrian Conlon
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934a1f7025
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Use the virtual methods, busRead and busWrite for all processor bus actions.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-03-02 21:58:34 +00:00 |
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Adrian Conlon
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ed47983928
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Speed up the Intel 8080 disassembler.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-03-02 21:41:06 +00:00 |
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Adrian Conlon
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f0376fa81e
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Use macros to define our device pins.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-01-14 23:17:54 +00:00 |
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Adrian Conlon
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92d23d82d6
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Start big refactor of device/CPU pin usage (to allow pin events throughout).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-01-14 02:10:17 +00:00 |
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Adrian Conlon
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68030610d8
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Move to an event driven clock tick event for all CPUs
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-01-09 23:24:33 +00:00 |
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Adrian Conlon
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a13ad5042a
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Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2019-01-06 11:27:43 +00:00 |
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Adrian Conlon
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f38d326ca7
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Improve the flexibility of the BUS mapping/read/write architecture.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-12-29 19:17:36 +00:00 |
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Adrian Conlon
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d6ebf00ccc
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Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
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2018-12-01 16:46:06 +00:00 |
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Adrian Conlon
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679275e930
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Correct Linux build errors.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
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2018-12-01 16:41:39 +00:00 |
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Adrian Conlon
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dc477cd050
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Use explicit enumeration types (improves type safety) where appropriate.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-12-01 15:24:29 +00:00 |
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Adrian Conlon
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a940a29283
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Unify build settings across all the EightBit libraries.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-28 21:24:51 +00:00 |
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Adrian Conlon
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0313037d6f
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Tidy the 8080 test configuration class a little.
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2018-11-27 22:19:15 +00:00 |
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Adrian Conlon
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e156b1ff1a
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Correct some more compilation warnings (across the whole EightBit project).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-25 19:02:11 +00:00 |
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Adrian Conlon
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e2e7fd0e00
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Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
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2018-11-16 23:50:04 +00:00 |
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Adrian Conlon
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5530522f11
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Correct a couple of small issues
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-16 23:49:52 +00:00 |
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Adrian Conlon
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fdbb28828f
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Apply the concept of powered components to the "board"
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-11 16:48:44 +00:00 |
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Adrian Conlon
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e688411cb9
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Refactor memory related code a little to make the hierarchy of classes a little easier to understand.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-04 16:38:57 +00:00 |
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Adrian Conlon
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8ef5d97366
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Update boost from 1.65 -> 1.68
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-04 12:58:01 +00:00 |
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Adrian Conlon
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68a785ceec
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Add an address masking to the memory mapping structure.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-11-01 23:43:29 +00:00 |
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Adrian Conlon
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b9ca27feb3
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Refactor the Intel 8080 core for C++17/14
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 18:51:30 +01:00 |
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Adrian Conlon
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8dbb3eafec
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Switch to C++17 standard in all EightBit projects.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-27 14:28:14 +01:00 |
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Adrian Conlon
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1b2ddd8843
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Don't expose the bus via the CPU any more: if a component needs the bus, it should be prepared to hold a reference to it.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-20 20:52:41 +01:00 |
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Adrian Conlon
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337e35ca1b
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Use the newly added CPU pokeWord method.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-10-14 20:39:09 +01:00 |
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Adrian Conlon
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8d3551e681
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Refactor bit set/get routines from processor class to lower level chip class.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-29 14:08:44 +01:00 |
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Adrian Conlon
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6bb8118c7f
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Add miscellaneous documentation and test gubbins
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-21 00:17:25 +01:00 |
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Adrian Conlon
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fe3794e011
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Simplify register16_t usage a little.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-16 12:00:29 +01:00 |
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Adrian Conlon
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7d840f1a42
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Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-09-15 14:35:59 +01:00 |
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Adrian Conlon
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a8cc289149
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Whoops: The "Bus" class *really* isn't allowed to know the "endianness" of the attached processor!
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-27 11:27:33 +01:00 |
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Adrian Conlon
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1212e8d4f0
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Tidy some processor virtual specifications.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 13:35:53 +01:00 |
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Adrian Conlon
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6d4223c368
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Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-25 01:34:30 +01:00 |
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Adrian Conlon
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426043f80b
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Remove some commented lines
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-17 14:00:24 +01:00 |
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Adrian Conlon
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ed76038bfa
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More memptr adjustments
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-17 13:59:59 +01:00 |
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Adrian Conlon
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70c70af969
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Sort out some exception and member initialisation rules.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-08-11 21:19:19 +01:00 |
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Adrian Conlon
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e40240694f
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More removal of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-24 22:33:02 +01:00 |
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Adrian Conlon
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cf311a5113
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Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
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2018-06-24 21:09:53 +01:00 |
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Adrian Conlon
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cac871cf2b
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Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-24 20:58:20 +01:00 |
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Adrian Conlon
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67487b5b6e
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Simplify the usage of the register16_t union.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-16 00:55:32 +01:00 |
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Adrian Conlon
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89632774a7
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Bring closer to the Z80 implementation again.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-11 23:02:27 +01:00 |
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Adrian Conlon
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fbf098ae00
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Simplify memory event handlers and ROM recognition a little (bit of speed difference)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-10 22:00:52 +01:00 |
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Adrian Conlon
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3e854c7c49
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Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-06-10 00:40:56 +01:00 |
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Adrian Conlon
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4b4f6b1a49
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Some *small* consistency changes. Perhaps some performance gains.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-04-11 23:53:26 +01:00 |
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Adrian Conlon
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d818095815
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MEMPTR is really only a concept of Intel style processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-18 22:40:23 +00:00 |
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Adrian Conlon
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97a121b8d4
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Unneeded UNREACHABLEs can cause gcc to produce problematic code. TBC
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-17 23:34:27 +00:00 |
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Adrian Conlon
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dac58b121a
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More small tidyups in the core emulator set.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-12 01:22:28 +00:00 |
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Adrian Conlon
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45dc274167
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Get rid of wrappers for bus access: i.e. make it clearer where the bus is being read/written.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-03-10 01:53:57 +00:00 |
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Adrian Conlon
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adf506a41e
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Optimisation: Prefer return by value to return by reference. ~10% speed-up!
Just watch a video by Chandler Carruth from 2015, where he talked about C++ optimisers...
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2018-02-25 19:48:01 +00:00 |
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