Adrian.Conlon
|
57cfd79c44
|
Tidy header file usage a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-09-01 16:41:50 +01:00 |
|
Adrian.Conlon
|
9b43b74c28
|
Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-09-01 16:01:40 +01:00 |
|
Adrian.Conlon
|
ef3203d943
|
Tidy raster line execution a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-09-01 13:24:41 +01:00 |
|
Adrian.Conlon
|
e42484d35c
|
Better DIV implementation. Incremented as a word and exposed as the high part in the DIV register.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-09-01 13:17:20 +01:00 |
|
Adrian.Conlon
|
a2784ae02d
|
Timers can (of course) expire during CPU instruction execution.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-31 17:21:44 +01:00 |
|
Adrian.Conlon
|
711d4f4384
|
Add some GB IO register information in the disassembler. Nothing fancy!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-31 17:18:38 +01:00 |
|
Adrian.Conlon
|
1eb127ed72
|
Add power support to processor base class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-31 12:13:00 +01:00 |
|
Adrian.Conlon
|
20c126adfc
|
Correct a couple of cycle counting issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-31 01:19:51 +01:00 |
|
Adrian.Conlon
|
e70686c5de
|
Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-30 23:17:34 +01:00 |
|
Adrian.Conlon
|
5fe3d458df
|
Correct F8 carry flag usage.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-29 22:36:26 +01:00 |
|
Adrian.Conlon
|
daab0484c3
|
Use corrected LR35902 library to run test loop.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-29 22:35:56 +01:00 |
|
Adrian.Conlon
|
ea033d3984
|
Move a fair amount of code from the GameBoy implementation into the EightBit library for the LR35902
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-29 22:23:32 +01:00 |
|
Adrian.Conlon
|
9da58a5af7
|
Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
|
2017-08-29 17:28:24 +01:00 |
|
Adrian.Conlon
|
8033948aef
|
Very small argument tidy.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-29 17:26:41 +01:00 |
|
Adrian.Conlon
|
ec15a2c90c
|
Correct SP arithmetic methods: All Blargg CPU tests now pass. Hurrah!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-28 23:04:25 +01:00 |
|
Adrian.Conlon
|
329fd269ed
|
Share some more code from the 6502 processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-28 18:52:48 +01:00 |
|
Adrian.Conlon
|
73a34f4fae
|
Start a more careful documentation of the I/O registers.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-26 09:46:53 +01:00 |
|
Adrian.Conlon
|
4cbab14750
|
Remove unused StatusFlags.h header. Not sure why that was still there!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-25 22:37:10 +01:00 |
|
Adrian.Conlon
|
c6df5ba775
|
Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
|
2017-08-25 10:33:31 +01:00 |
|
Adrian.Conlon
|
246e6431ab
|
Small correction to GB SP instructions passes a little more of the Blargg tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-25 10:33:22 +01:00 |
|
Adrian.Conlon
|
01317796c0
|
Effective address calculation isn't required for Gameboy MBC1
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-24 23:47:28 +01:00 |
|
Adrian.Conlon
|
ae4106ce5a
|
Preliminary MBC1 support. Enough to run cpu_instrs.gb to completion. Hurrah!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-24 23:23:40 +01:00 |
|
Adrian.Conlon
|
9964070b85
|
Refactor to allow peek/poke/reference to share a common implementation as much as possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-24 11:28:01 +01:00 |
|
Adrian.Conlon
|
448ee2f09f
|
Refactor the MBC implementation to allow a single point of definition.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-24 10:28:31 +01:00 |
|
Adrian.Conlon
|
da96454185
|
Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
|
2017-08-23 23:18:52 +01:00 |
|
Adrian.Conlon
|
2c7e32aa78
|
First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-23 23:17:45 +01:00 |
|
Adrian.Conlon
|
2c99e09618
|
Correct compiler type for LR35902 fuse tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-23 22:22:58 +01:00 |
|
Adrian.Conlon
|
a087750d9c
|
Interrupt handling doesn't use the current running cycles.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-21 09:34:17 +01:00 |
|
Adrian.Conlon
|
1cf73a8aa4
|
Correct test runner, to ensure LR35902 tests work correctly.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-20 23:01:49 +01:00 |
|
Adrian.Conlon
|
8716035396
|
Second stage halt implementation: allow halt state to be exited by an interrupt.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-20 20:09:21 +01:00 |
|
Adrian.Conlon
|
57e48e389f
|
First stage "halt" reimplementation: allow the clock to run during halt, but nothing else.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-20 19:44:57 +01:00 |
|
Adrian.Conlon
|
42b0fdc23d
|
Implement DIV timer (TBC)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-20 09:52:26 +01:00 |
|
Adrian.Conlon
|
75b17e47a8
|
Better method of enabling/disabling boot ROM.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-19 17:33:28 +01:00 |
|
Adrian.Conlon
|
86a4e22ae1
|
First stab at implementing GB timer control.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-18 19:00:10 +01:00 |
|
Adrian.Conlon
|
0457dffba4
|
Rewrite GB interrupt handling to properly document the trigger sequence.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-18 09:49:06 +01:00 |
|
Adrian.Conlon
|
039545bd08
|
Rearrange some of the shift/rotate code a little to make it easier to read.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-16 22:51:15 +01:00 |
|
Adrian.Conlon
|
54ab96ea38
|
Correct expected test results, now we know the zero flag is cleared for shift/rotate operations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-15 23:35:27 +01:00 |
|
Adrian.Conlon
|
87e97eea8c
|
Fixes rotates and shifts zero flag use (i.e. 09 - op r,r,s now runs successfully)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-15 23:27:46 +01:00 |
|
Adrian.Conlon
|
2bbb021176
|
Correct case error in LR35902 disassembler
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 22:57:46 +01:00 |
|
Adrian.Conlon
|
6506b33436
|
Add comment noting GB: unique instruction.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 18:41:51 +01:00 |
|
Adrian.Conlon
|
c7dafb5f75
|
Another GB test corrected.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 18:11:19 +01:00 |
|
Adrian.Conlon
|
00f6c14703
|
Another couple of tests fixed.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 10:54:44 +01:00 |
|
Adrian.Conlon
|
a8c3c46709
|
Fix broken GB pop af test, to take low order flags mask.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 10:42:34 +01:00 |
|
Adrian.Conlon
|
043b7f3338
|
Another tested GB instruction.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 10:36:19 +01:00 |
|
Adrian.Conlon
|
e7116c5b56
|
Another GB test fixed.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-14 10:22:22 +01:00 |
|
Adrian.Conlon
|
4d322aeeb3
|
More GB tests fixed
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 23:01:52 +01:00 |
|
Adrian.Conlon
|
4a0d2dd930
|
Miscellaneous GB tests fixed. No surprises.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 22:51:15 +01:00 |
|
Adrian.Conlon
|
e6c4199b2a
|
More miscellaneous GB tests fixed.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 22:11:43 +01:00 |
|
Adrian.Conlon
|
fb13d9fdce
|
Correct GB: SWAP r operation. The demoted high nibble was being effectively zeroed each time.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 21:34:19 +01:00 |
|
Adrian.Conlon
|
c10dced63e
|
Add test for GB SWAP r instructions.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 21:31:28 +01:00 |
|
Adrian.Conlon
|
6bbd7392dc
|
LR35902 clears the half-carry flag on a CCF
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 19:51:42 +01:00 |
|
Adrian.Conlon
|
f41050b60c
|
Add working test for 3a: LDD A,(HL)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 12:52:30 +01:00 |
|
Adrian.Conlon
|
ca1176f0bb
|
Fix test 32: LDD (HL),A from GB programming manual.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 12:02:45 +01:00 |
|
Adrian.Conlon
|
3355179884
|
Fix test for 2a: LDI A,(HL)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 11:48:01 +01:00 |
|
Adrian.Conlon
|
a739c0eddf
|
Use daa examples from GB programming manual for tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-13 11:07:01 +01:00 |
|
Adrian.Conlon
|
c84b757ad9
|
Move GB documentation to be closer to the LR35902 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 23:55:56 +01:00 |
|
Adrian.Conlon
|
dd873d9761
|
Start adding LR35902 tests, where wrong.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 23:54:53 +01:00 |
|
Adrian.Conlon
|
a24581caee
|
Add comments pointing out GB specific instructions in the test input suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 15:48:15 +01:00 |
|
Adrian.Conlon
|
37c86fa5cf
|
All comments in the LR35902 test input file
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 15:47:03 +01:00 |
|
Adrian.Conlon
|
0084d962c1
|
Unused Z80 prefixes removed from the test suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 14:49:32 +01:00 |
|
Adrian.Conlon
|
78e5451f93
|
Remove remaining Z80 -> LR35902 test translation code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 14:29:12 +01:00 |
|
Adrian.Conlon
|
e7001b2425
|
Now runs the first pass of the translated Z80 tests as LR35902 style instructions
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-12 14:22:10 +01:00 |
|
Adrian.Conlon
|
5526892e2f
|
Adjust for the differences between Z80 LR35902 flags (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-11 23:16:24 +01:00 |
|
Adrian.Conlon
|
42b1b7dc53
|
Add a one off converter for Z80 -> LR35902 fuse tests (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-10 23:46:41 +01:00 |
|
Adrian.Conlon
|
f0515ae65f
|
First stab at a port of the fuse tests to LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-10 20:34:17 +01:00 |
|
Adrian.Conlon
|
7948962d70
|
Because of its boot room, the LR35902 needs a custom clear mechanism.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-10 20:30:37 +01:00 |
|
Adrian.Conlon
|
9fcb349e1f
|
Brought the LR35902 a little closer to the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-08 13:32:51 +01:00 |
|
Adrian.Conlon
|
88d773708c
|
Correct some outstanding LR35902 problems arising.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-06 22:04:13 +01:00 |
|
Adrian.Conlon
|
016b3bca59
|
Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-08-06 17:06:48 +01:00 |
|
Adrian.Conlon
|
261433bd6e
|
Remove unneeded 16-bit operations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-27 21:44:24 +01:00 |
|
Adrian.Conlon
|
569e1925ce
|
Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
|
2017-07-25 21:23:27 +01:00 |
|
Adrian.Conlon
|
b6dd48ca63
|
Some more small clarifications of shared processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-25 18:56:43 +01:00 |
|
Adrian.Conlon
|
99c1e8e2f1
|
Correct 8-bit signed integer display problem in disassembler.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-22 14:07:26 +01:00 |
|
Adrian.Conlon
|
9a264c7c06
|
Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-22 10:23:13 +01:00 |
|
Adrian.Conlon
|
0a02c32695
|
Some things (namely shift.rotate instructions) don't need to be quite so close to the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-21 19:23:36 +01:00 |
|
Adrian.Conlon
|
beca76d733
|
Share instruction decoding mechanism between Intel derived processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-21 13:33:17 +01:00 |
|
Adrian.Conlon
|
7c3fc469a8
|
Bring LR35902 a little closer to the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-20 12:37:54 +01:00 |
|
Adrian.Conlon
|
1ee9a010b5
|
Finally: a working daa
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-20 10:42:18 +01:00 |
|
Adrian.Conlon
|
9c240b7ea8
|
Correct for CF not being the first bit of the flags register (why!!!!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-19 23:16:17 +01:00 |
|
Adrian.Conlon
|
36fbee35fb
|
Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-07-19 13:59:28 +01:00 |
|
Adrian.Conlon
|
758574007d
|
Ensure GB register accesses pass through bus notification code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-18 21:41:10 +01:00 |
|
Adrian.Conlon
|
974c3353cc
|
Simplify LR35902 memory read/write a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-07-18 11:28:06 +01:00 |
|
Adrian.Conlon
|
35def4184a
|
Start adding enough infrastructure to support memory mapped IO on LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-18 00:13:41 +01:00 |
|
Adrian.Conlon
|
627d30e896
|
Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
|
2017-07-17 21:39:13 +01:00 |
|
Adrian.Conlon
|
2b29c3fe64
|
Correct a couple of LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-17 21:38:58 +01:00 |
|
Adrian.Conlon
|
3c0a1697fd
|
Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-07 09:27:06 +01:00 |
|
Adrian.Conlon
|
4cd2dc68e1
|
Correct some (but not all!) project configuration anomalies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-07-05 19:36:25 +01:00 |
|
Adrian.Conlon
|
67174d74af
|
Correct some memory access issues in LR35902
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-23 21:23:20 +01:00 |
|
Adrian.Conlon
|
af375ab10f
|
Some more shared code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-22 19:00:53 +01:00 |
|
Adrian.Conlon
|
052df61250
|
Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-20 14:09:44 +01:00 |
|
Adrian.Conlon
|
c7e65f5447
|
Consistency changes to the projects.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-19 13:53:37 +01:00 |
|
Adrian.Conlon
|
c9bf24d1fa
|
Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-19 13:53:00 +01:00 |
|
Adrian.Conlon
|
23108a8536
|
Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-18 18:14:39 +01:00 |
|
Adrian.Conlon
|
5f288cf0e3
|
Some more small tidy ups.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-16 20:31:32 +01:00 |
|
Adrian.Conlon
|
327d391ecb
|
Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-16 13:52:10 +01:00 |
|
Adrian.Conlon
|
71e6902aeb
|
Simplify and remove a bunch of code. Getting there!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-15 22:21:26 +01:00 |
|
Adrian.Conlon
|
66d3a5ae29
|
Couple of small simplifications.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-13 23:43:21 +01:00 |
|
Adrian.Conlon
|
8f3aef1c3e
|
Make LR35902 a little more like the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 23:56:11 +01:00 |
|
Adrian.Conlon
|
eb8a93726d
|
Correct a few small LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 22:07:48 +01:00 |
|
Adrian.Conlon
|
0291970427
|
Further work on uniting the 8080 family processor family.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 21:08:40 +01:00 |
|
Adrian.Conlon
|
627e41bf35
|
Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 09:45:34 +01:00 |
|
Adrian.Conlon
|
49d7a4c169
|
Whoops: missed a couple of flag adjustments.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 16:19:35 +01:00 |
|
Adrian.Conlon
|
838580cc3d
|
More changes to bring LR35902 in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 16:01:12 +01:00 |
|
Adrian.Conlon
|
93bac42547
|
Bring LR35902 a little more in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 11:42:32 +01:00 |
|
Adrian.Conlon
|
1c8d842bde
|
Tidy header usage a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 10:29:28 +01:00 |
|
Adrian.Conlon
|
f3fe475d44
|
Implement enough changes to build LR35902
|
2017-06-09 10:23:51 +01:00 |
|
Adrian.Conlon
|
105032f08a
|
Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-04 21:38:34 +01:00 |
|