Commit Graph
23 Commits
Author SHA1 Message Date
Adrian Conlon d533593a14 Lots of miscellaneous cycle accurate updates 2026-03-21 16:18:39 +00:00
Adrian Conlon d838ad7946 Sync to the .Net version of the Z80 code 2025-01-28 21:44:22 +00:00
Adrian Conlon 8b6c4a205e Lot's of small niggles corrected across the EightBit libraries 2024-03-18 13:03:41 +00:00
Adrian Conlon 8e0092ec9d Tidy up noexcept specification 2022-01-17 19:10:15 +00:00
Adrian Conlon c8bdabf34f Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2020-02-09 11:51:58 +00:00
Adrian Conlon 92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout).
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-01-14 02:10:17 +00:00
Adrian Conlon dc477cd050 Use explicit enumeration types (improves type safety) where appropriate.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-12-01 15:24:29 +00:00
Adrian Conlon 555423d10a Tidy the Z80 test classes, based on code analysis.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-27 22:28:09 +00:00
Adrian Conlon 5ff883305e Modernise the signal handling and construction sequence of the Z80 test board.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-24 10:56:00 +00:00
Adrian Conlon fdbb28828f Apply the concept of powered components to the "board"
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-11 16:48:44 +00:00
Adrian Conlon 68a785ceec Add an address masking to the memory mapping structure.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-11-01 23:43:29 +00:00
Adrian Conlon 7d840f1a42 Modifying the manner in which memory is mapped, allows a fairly clean mechanism for loading Intel "hex" files.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-09-15 14:35:59 +01:00
Adrian Conlon 6d4223c368 Start moving towards reset being just another style of interrupt.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-08-25 01:34:30 +01:00
Adrian Conlon 256e25e344 Tidy up the test suite usage between the 8080 and Z80 processors. 2018-08-12 16:30:32 +01:00
Adrian Conlon e40240694f More removal of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-24 22:33:02 +01:00
Adrian Conlon cac871cf2b Remove duplicated code (from const definitions) the performance benefit isn't worth the amount of duplicated code.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-24 20:58:20 +01:00
Adrian Conlon fbf098ae00 Simplify memory event handlers and ROM recognition a little (bit of speed difference)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-10 22:00:52 +01:00
Adrian Conlon 3e854c7c49 Const some more bus/processor usage, and ensure the data bus is a member, not a reference to memory.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2018-06-10 00:40:56 +01:00
Adrian Conlon 67c27d4a3e GSL + CPP core guidelines changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2017-11-18 14:29:30 +00:00
Adrian.Conlon cae34d61d1 Ensure the Z80 unit tests run successfully to completion.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-09-07 01:04:09 +01:00
Adrian.Conlon 0e7ad4dd01 Correct a couple of inconsistencies in the test harness.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:40:16 +01:00
Adrian.Conlon a4f8770eb0 Correct a couple of small compilation issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 18:08:13 +01:00
Adrian.Conlon 211c75d84d Add Z80 processor and tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-05 22:39:15 +01:00