Commit Graph
60 Commits
Author SHA1 Message Date
Adrian Conlon 38a8d2d850 Try and reduce the number of virtual calls in EightBit library 2026-09-27 17:43:12 +01:00
Adrian Conlon ee9917bb7f Remove unneeded comment 2026-05-28 21:14:24 +01:00
Adrian Conlon c8e69424db 8080 tests speedup 2026-05-25 13:14:20 +01:00
Adrian Conlon 37fc258d47 Some simplifications 2026-05-21 11:57:52 +01:00
Adrian Conlon 741feb4342 Performance change: avoid dropping Bus.Data return values 2026-05-18 17:28:41 +01:00
Adrian Conlon 9a011b3c57 Start implementing HD6309. Introduction of 32-bit operations has forced me to rename some of "Word" methods to better indicate size 2026-05-16 21:10:23 +01:00
Adrian Conlon e0fffdaa5e Some performance improvements. About 50Mhz for Z80 emulator. 275Mhz to 325Mhz. Interesting. 2026-05-16 11:09:03 +01:00
Adrian Conlon ac200d7f76 Simplify ignored return value handling 2026-05-12 22:21:13 +01:00
Adrian Conlon 699791f7a4 Simplify intermediate 16-bit register usage 2026-04-16 13:47:24 +01:00
Adrian Conlon 53e33b9eef Some simplifications 2026-04-07 12:02:31 +01:00
Adrian Conlon 47baff3740 Correct some 8080 timing mistakes 2026-03-27 18:16:09 +00:00
Adrian Conlon 0029427d6f Fix 8080 implementation to be closer to Z80 2026-03-21 09:48:35 +00:00
Adrian Conlon a8ef9aa7db simplification and unification of build stuff 2026-02-16 11:15:58 +00:00
Adrian Conlon e1bf58afbc More sharing of concepts between all Intel style processors 2026-01-03 23:17:30 +00:00
Adrian Conlon 1dfd9621a1 Share some more common code between Intel style procesors 2025-10-15 19:46:10 +01:00
Adrian Conlon ceacac4741 Fix up some oddities in the EightBit library 2025-10-06 13:44:31 +01:00
Adrian Conlon 558da38f12 Note commonality between Intel-style processors 2025-08-10 12:43:34 +01:00
Adrian Conlon 3a8e379efd Align with Z80 implementation 2025-08-07 09:42:52 +01:00
Adrian Conlon 60ef099208 Tidy some inconsistencies in various emulation 2025-08-01 15:01:20 +01:00
Adrian Conlon 2f338c6c46 Tidy register increment/decrement a little. 2025-07-25 16:32:30 +01:00
Adrian Conlon 36e983526e Add increment/decrement operations to the Register16 class 2025-05-11 19:24:40 +01:00
Adrian Conlon 19c18445d6 Remove a couple of pointless "Word"isms 2025-05-08 19:46:43 +01:00
Adrian Conlon 9e0006187e Port access in Intel processors is 16 rather than 8 bit addressed 2025-05-08 13:00:30 +01:00
Adrian Conlon db1da4f506 Remove extra line 2025-05-06 21:39:47 +01:00
Adrian Conlon e1696721f6 Simplifications and refactorings in th intel processors 2025-05-05 21:06:39 +01:00
Adrian Conlon 93e09c192f Share instruction fetch and halt implementations 2025-05-04 11:41:28 +01:00
Adrian Conlon 2336222c97 Push more core processor handling into base classes. 2025-05-04 10:53:23 +01:00
Adrian Conlon cbe871d365 Isolate program counter increment/decrement (to be used for HALT processing) 2025-05-03 23:25:06 +01:00
Adrian Conlon dd1d141f15 Simplify conditional flag handling in intel processors 2025-04-29 12:27:39 +01:00
Adrian Conlon 1b1b92ac2c More event handling simplification 2025-03-29 13:18:54 +00:00
Adrian Conlon 3b80ee7b37 Shared test harness 2024-10-12 11:48:54 +01:00
Adrian Conlon b1b050b1d3 .net 9 analysis changes 2024-10-12 11:09:29 +01:00
Adrian Conlon a3fd5b055a .net 9 Analysis 2024-10-12 09:55:05 +01:00
Adrian Conlon f525fcf412 Apply .net 9 analysis changes 2024-10-12 09:44:39 +01:00
Adrian Conlon 3d9b0aac56 Update to .Net 9 2024-10-12 08:49:47 +01:00
Adrian Conlon 0d695a6d7a Tidy up test harnesses 2024-10-10 11:27:31 +01:00
Adrian Conlon c8ac0f20dc Step can be split a little to make it easier to override. 2024-07-24 17:21:49 +01:00
Adrian Conlon d8fad7b988 Try to minimise use of "Word" from Register16 2024-06-30 12:30:07 +01:00
Adrian Conlon a64f370d7c Compilation fixes 2024-05-29 10:56:16 +01:00
Adrian Conlon 291a212504 Ugrade to .NET 8.0: First pass 2024-05-18 21:57:33 +01:00
Adrian Conlon 47ecdad3e8 Work towards accurate bus/memory/io timings. Especially Z80 m-cycle timing.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-07-05 00:09:51 +01:00
Adrian Conlon cd4af67177 Work my way through a bunch of the analysis suggestions.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-06-22 00:00:15 +01:00
Adrian Conlon db0e8c613f Update all analysis (and other!) nuget packages, ensure builds across all projects.
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
2020-06-21 18:35:10 +01:00
Adrian Conlon 73d08fe7a7 Upgrade .net version and analysis packages en mass.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-12-04 01:03:17 +00:00
Adrian Conlon bc491884b0 Synchronise HALT implementation for Intel style processors with the C++ version.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-08-29 09:05:31 +01:00
Adrian Conlon 0dd6f1025f Simplify 8080/Z80 XHTL implementation.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-08-28 23:18:08 +01:00
Adrian Conlon e35dabd130 Fuse fixes: Correct bus read/write order of XHTL
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-08-15 14:31:23 +01:00
Adrian Conlon 0ada703504 Remove unnecessary reference dependencies from the .Net EightBit projects.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-07-28 00:35:20 +01:00
Adrian Conlon d0c620e709 Use MEMPTR, rather than an i8080 specific intermediate register.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-07-14 17:36:03 +01:00
Adrian Conlon 853b6e2b08 Correct some straightforward analysis issues.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
2019-07-01 00:15:25 +01:00