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cleanup
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@@ -680,39 +680,6 @@ void OH_BitBranch (const OpcDesc* D)
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void OH_BitBranch_Q (const OpcDesc* D)
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{
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char* BranchLabel;
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/* Get the operands */
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unsigned char TestAddr = GetCodeByte (PC+3);
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signed char BranchOffs = GetCodeByte (PC+4);
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/* Calculate the target address for the branch */
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unsigned BranchAddr = (((int) PC+5) + BranchOffs) & 0xFFFF;
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/* Generate labels in pass 1. The bit branch codes are special in that
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** they don't really match the remainder of the 6502 instruction set (they
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** are a Rockwell addon), so we must pass additional flags as direct
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** value to the second GenerateLabel call.
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*/
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GenerateLabel (D->Flags, TestAddr);
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GenerateLabel (flLabel, BranchAddr);
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/* Make a copy of an operand, so that
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** the other operand can't overwrite it.
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** [GetAddrArg() uses a statically-stored buffer.]
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*/
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BranchLabel = xstrdup (GetAddrArg (flLabel, BranchAddr));
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/* Output the line */
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OneLine (D, "%s,%s", GetAddrArg (D->Flags, TestAddr), BranchLabel);
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xfree (BranchLabel);
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}
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void OH_BitBranch_m740 (const OpcDesc* D)
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/* <bit> zp, rel
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** NOTE: currently <bit> is part of the instruction
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@@ -108,7 +108,6 @@ void OH_Direct_Q (const OpcDesc*);
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void OH_DirectIndirectZ_Q (const OpcDesc* D);
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void OH_Absolute_Q (const OpcDesc* D);
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void OH_AbsoluteX_Q (const OpcDesc* D);
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void OH_BitBranch_Q (const OpcDesc* D);
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void OH_DirectX_Q (const OpcDesc* D);
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void OH_Implicit_ea_45GS02 (const OpcDesc* D);
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void OH_Implicit_42_45GS02 (const OpcDesc* D);
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