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Fixed a problem with the last change in crt0.s: The symbols for the RAM memory

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area had been used but not defined in the linker config. Changed the startup
module and the linker config to use the common loadaddr and exehdr modules.


git-svn-id: svn://svn.cc65.org/cc65/trunk@4870 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
uz 2010-11-16 17:33:25 +00:00
parent 461bf5e81e
commit 8aff2a9159
2 changed files with 17 additions and 29 deletions
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16
libsrc/plus4/crt0.s
View File

@ -21,22 +21,6 @@
IRQInd = $500 ; JMP $0000 - used as indirect IRQ vector
; ------------------------------------------------------------------------
; BASIC header with a SYS call
.segment "EXEHDR"
.word Head ; Load address
Head: .word @Next
.word .version ; Line number
.byte $9E ; SYS token
.byte <(((Start / 1000) .mod 10) + '0')
.byte <(((Start / 100) .mod 10) + '0')
.byte <(((Start / 10) .mod 10) + '0')
.byte <(((Start / 1) .mod 10) + '0')
.byte $00 ; End of BASIC line
@Next: .word 0 ; BASIC end marker
; ------------------------------------------------------------------------
; Startup code

30
src/ld65/cfg/plus4.cfg
View File

@ -1,22 +1,26 @@
SYMBOLS {
__LOADADDR__: type = import;
__EXEHDR__: type = import;
__STACKSIZE__: type = weak, value = $0800; # 2k stack
}
MEMORY {
ZP: file = "", define = yes, start = $0002, size = $001A;
HEADER: file = %O, start = $0FFF, size = $000E;
RAM: file = %O, start = $100D, size = $ECF3 - __STACKSIZE__;
ZP: file = "", define = yes, start = $0002, size = $001A;
LOADADDR: file = %O, start = $0FFF, size = $0002;
HEADER: file = %O, start = $1001, size = $000C;
RAM: file = %O, define = yes, start = $100D, size = $ECF3 - __STACKSIZE__;
}
SEGMENTS {
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss;
BSS: load = RAM, type = bss, define = yes;
ZEROPAGE: load = ZP, type = zp;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss;
BSS: load = RAM, type = bss, define = yes;
ZEROPAGE: load = ZP, type = zp;
}
FEATURES {
CONDES: segment = INIT,