6502/cc65
1
0
Fork 0
mirror of https://github.com/cc65/cc65.git synced 2024-06-07 07:29:33 +00:00
Code Issues Projects Releases Wiki Activity

Merge 074ec82126 into b993d88339

Browse Source
This commit is contained in:
Olli Savia 2024-04-02 19:30:10 +03:00 committed by GitHub
commit a6cd46f0a6
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
3 changed files with 3 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
cfg/vic20-asm-32k.cfg
View File

@ -14,6 +14,7 @@ MEMORY {
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, optional = yes;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;

1
cfg/vic20-asm-3k.cfg
View File

@ -14,6 +14,7 @@ MEMORY {
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, optional = yes;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;

1
cfg/vic20-asm.cfg
View File

@ -14,6 +14,7 @@ MEMORY {
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, optional = yes;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;